ADM1026JST ON Semiconductor, ADM1026JST Datasheet - Page 14

• Manufacturer Part Number: ADM1026JST
• Description: IC CNTRL SYS REF/EEPROM 48LQFP
• Manufacturer: ON Semiconductor

Specifications of ADM1026JST

• Rohs Status: RoHS non-compliant
• Function: Hardware Monitor
• Topology: ADC, Comparator, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: 0°C ~ 100°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: 0°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 48-LFQFP

address for a subsequent read or block read. In this case, the
command byte is the high byte of the EEPROM address
from 80h to 9Fh. The (only) data byte is the low byte of the
EEPROM address. This is illustrated in Figure 20.
immediately after setting up the address, the master can
assert a repeat start condition immediately after the final
ACK and carry out a single−byte read or block read
operation without asserting an intermediate stop condition.
In this case, Bit 0 of EEPROM Register 3 should be set.
EEPROM memory can be written to only if it is previously
erased. Before writing to one or more EEPROM memory
locations that are already programmed, the page or pages
containing those locations must first be erased. EEPROM
memory is erased by writing an EEPROM page address plus
an arbitrary byte of data with Bit 2 of EEPROM Register 3
set to 1.
the EEPROM page address consists of the EEPROM
address high byte (from 80h to 9Fh) and the two MSBs of the
low byte. The lower six bits of the EEPROM address (low
byte only) specify addresses within a page and are ignored
during an erase operation.
is accessed before erasure is complete, the ADM1026
responds with No Acknowledge.
EEPROM. In this case, the command byte is the high byte
of the EEPROM address from 80h to 9Fh. The first data byte
is the low byte of the EEPROM address, and the second data
byte is the actual data. Bit 1 of EEPROM Register 3 must be
set. This is illustrated in Figure 22.
The protocol is also used to set up a 2−byte EEPROM
If it is required to read data from the EEPROM
The third use is to erase a page of EEPROM memory.
Because the EEPROM consists of 128 pages of 64 bytes,
Page erasure takes approximately 20 ms. If the EEPROM
Last, this protocol is used to write a single byte of data to
1
S
ADDRESS
SLAVE
2
Figure 20. Setting an EEPROM Address
1
S
Figure 19. Single Byte Write to RAM
ADDRESS
1
S
Figure 21. EEPROM Page Erasure
SLAVE
ADDRESS
W A
2
SLAVE
3
2
(80h TO 9Fh)
HIGH BYTE
W
ADDRESS
EEPROM
W A
3
A
4
3
(80h TO 9Fh)
HIGH BYTE
ADDRESS
EEPROM
(00h TO 6Fh)
ADDRESS
4
5
A
RAM
(00h TO FFh)
4
LOW BYTE
ADDRESS
EEPROM
5
A
6
(00h TO FFh)
A DATA A P
5
LOW BYTE
ADDRESS
EEPROM
6
6
7
A
ARBITRARY
7 8
DATA
A
8
7
P
8
http://onsemi.com
A Y
9 10
14
Block Write
to a slave device. The start address for a block write must
have been set previously. In the case of the ADM1026, this
is done by a Send Byte operation to set a RAM address or by
a write byte/word operation to set an EEPROM address.
EEPROM Register 3 must be set. Unlike some EEPROM
devices that limit block writes to within a page boundary,
there is no limitation on the start address when performing
a block write to EEPROM, except:
•
•
In this operation, the master device writes a block of data
When performing a block write to EEPROM, Bit 1 of
There must be at least 32 locations from the start
address to the highest EEPROM address (9FF) to avoid
writing to invalid addresses.
If the addresses cross a page boundary, both pages must
be erased before programming.
S
10. The master sends a packet error checking (PEC)
12. The master asserts a stop condition on the SDA to
11. The ADM1026 checks the PEC byte and issues an
1
S
ADDRESS
1. The master device asserts a start condition on the
2. The master sends the 7−bit slave address followed
3. The addressed slave device asserts an ACK on the
4. The master sends a command code that tells the
5. The slave asserts an ACK on the SDA.
6. The master sends a data byte (20h) that tells the
7. The slave asserts an ACK on the SDA.
8. The master sends 32 data bytes.
9. The slave asserts an ACK on the SDA after each
SLAVE
ADDRESS
Figure 23. Block Write to EEPROM or RAM
SLAVE
Figure 22. Single−Byte Write to EEPROM
SDA.
by the write bit (low).
SDA.
slave device to expect a block write. The
ADM1026 command code for a block write is A0h
(10100000).
slave device that 32 data bytes are being sent to it.
The master should always send 32 data bytes to
the ADM1026.
data byte.
byte.
ACK if correct. If incorrect (NACK), the master
resends the data bytes.
end the transaction.
2
W A
W A
A0h BLOCK
COMMAND
WRITE
3
(80h TO 9Fh)
HIGH BYTE
ADDRESS
EEPROM
A
4
COUNT
BYTE
A DATA 1
A
5
(00h TO FFh)
LOW BYTE
ADDRESS
EEPROM
A
6
DATA 2 A DATA
A DATA
7
32
8
A
PEC
9 10
A
A P
Y