LM2636M/NOPB National Semiconductor, LM2636M/NOPB Datasheet - Page 8

IC REG SYNCH BUCK 5-BIT 20-SOIC

LM2636M/NOPB

Manufacturer Part Number
LM2636M/NOPB
Description
IC REG SYNCH BUCK 5-BIT 20-SOIC
Manufacturer
National Semiconductor
Datasheet

Specifications of LM2636M/NOPB

Applications
Power Supplies
Current - Supply
2.5mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*LM2636M
*LM2636M/NOPB
LM2636M
www.national.com
Applications Information
fully turned on. The voltage can be either supplied from
a separate source other than the input voltage or can be
generated locally by utilizing a charge pump structure. In a
typical desktop microprocessor application, if 5V is chosen
to be the input voltage, then 12V can be used for the
BOOTV. If 12V is not available, a simple charge pump
circuitry consisting of a diode and a small capacitor can be
used, as shown in Figure 3.
When the low side FET is on, the charge pump capacitor is
charged to near the input voltage through the diode. When
low side FET is turned off, the high side FET driver is
enabled, and the charge pump capacitor starts to charge the
high side FET gate until it is fully on. By this time the high
side FET source node will fly to close to input voltage level
and the upper node of the capacitor will also fly to one input
voltage higher than the input voltage, enabling the high side
FET driver to continue working.
For a BOOTV of 12V, the initial gate charging current is
typically 2A, and the initial gate discharging current is typi-
cally 6A, good for high speed switching.
The LM2636 gate drives are of BiCMOS design. Unlike
some other bipolar VRM control ICs, the gate drive has
rail-to-rail swing that ensures no spurious turn-on due to
capacitive coupling.
Another feature of the FET gate drives is the adaptive non-
overlapping mechanism. A gate driver is not turned on until
the other is fully off. The dead time in between is typically 20
ns. This avoids the potential shoot-through problem and
helps improve efficiency.
Load Transient Response
In a typical modern MPU application such as the Pentium II
core voltage power supply, load transient response is a
critical issue. The LM2636 utilizes the conventional voltage
feedback technology as the primary feedback control
method. When the load transient happens, the error in the
output voltage level is fed to the error amplifier. The output of
the
internally generated PWM ramp signal and the result of the
comparison is a series of pulses with certain duty ratios.
These pulses are used to control the turn-on and turn-off of
the MOSFET gate drivers. In this way, the error in the output
voltage gets “compensated” or cancelled by the change in
the duty ratio of the FET switches. During a large load
FIGURE 3. BOOTV Voltage Supplied by a Charge Pump
error
amplifier
is
then
compared
(Continued)
with
10083406
an
8
transient, depending on the compensation design, the
change in duty ratio can be as fast as less than one switch-
ing cycle. Refer to Design Considerations section for more
details.
Besides the usual voltage mode feedback control loop, the
LM2636 also has a pair of fast comparators (the MIN and
MAX comparators) to help maintain the output voltage dur-
ing a large and fast load transient. The trip points of the
comparators are set to
When the load transient is so large that the output voltage
goes outside the
will bypass the primary voltage control loop and immediately
set the duty ratio to either maximum value or to zero. This
provides the fastest possible way to react to such a large
load transient in a classical buck converter.
Power Good Signal
The power good signal is used to indicate that the output
voltage is within specified range. In the LM2636, the range is
set to a
start, the power good signal is always low. At the end of the
soft start session,the output voltage is checked and the
PWRGD pin will be asserted if the voltage is within specified
range.
Over Voltage Protection
When the output voltage exceeds 115% of the DAC output
voltage after the end of soft start, the LM2636 will enter over
voltage protection mode in which it shuts itself down. The
upper gate driver is held low while the lower gate driver is
held high. PWRGD will be low. For LM2636 to recover from
OVP mode, either OUTEN or V
Another more subtle way to recover is to float all the VID pins
and reapply the correct code.
Current Limit
Current limit is realized by sensing the V
high side MOSFET when it is on. Since the r
MOSFET is a known value, current through the MOSFET
can be known by monitoring V
the three parameters is:
To implement the current limit function, an external resistor
R
the drain of the high side MOSFET and the IMAX pin. A
constant current of around 180 µA is forced into the IMAX pin
and causes a fixed voltage drop across the R
This voltage drop is then compared with the V
side MOSFET and if the latter is higher, over current is
reached. So the appropriate value of R
determined current limit level I
following equation:
For example, if we know that the r
20 mΩ, and the current limit we want to set is 20A, then we
should choose the value of R
To provide the greatest protection over the high side MOS-
FET, cycle by cycle protection is implemented. The sampling
of the V
IMAX
is need. The resistor should be connected between
±
DS
10% window of the DAC output voltage. During soft
starts as early as about 300 ns after the switch is
±
5% window, the MIN or MAX comparator
±
5% of the DAC output voltage.
IMAX
DS
CC
LIM
. The relationship between
voltage has to be toggled.
can be calculated by the
DS_ON
to be 2.2 kΩ.
of the MOSFET is
DS
IMAX
voltage of the
DS
IMAX
DS_ON
for a pre-
of the high
resistor.
of a

Related parts for LM2636M/NOPB