IR3086AMPBF International Rectifier, IR3086AMPBF Datasheet - Page 14

• Manufacturer Part Number: IR3086AMPBF
• Description: IC PHASE CONTROLLER OVP 20MLPQ
• Manufacturer: International Rectifier
• Series: XPhase™r

Specifications of IR3086AMPBF

• Applications: Processor
• Current - Supply: 10mA
• Voltage - Supply: 8.4 V ~ 14 V
• Operating Temperature: 0°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 20-MLPQ
• Ic Function: Phase IC With Fault And OverTemp Detect
• Supply Voltage Range: 8.4V To 14V, 6V To 25V, 6V To 14V
• Operating Temperature Range: -40°C To +150°C
• Digital Ic Case Style: MLPQ
• No. Of Pins: 20
• Rohs Compliant: Yes
• Package: 20-Lead MLPQ
• Circuit: X-Phase Phase IC
• Iout (a): 2.5A Gate Driver
• Pbf: PbF Option Available
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *IR3086AMPBF

DESIGN PROCEDURES – IR3081A AND IR3086A CHIPSET
IR3081A EXTERNAL COMPONENTS
Oscillator Resistor Rosc
The oscillator of IR3081A generates a triangle waveform to synchronize the phase ICs, and the switching frequency
of the each phase converter equals the oscillator frequency, which is set by the external resistor R
the curve in Figure 13 of IR3081A Data Sheet.
Soft Start Capacitor C
Because the capacitor C
over-current latch delay time, and power good delay time, they should be considered together while choosing
C
The SS/DEL pin voltage controls the slew rate of the converter output voltage, as shown in Figure 10 of IR3081A.
After the ENABLE pin voltage rises above 0.6V, there is a soft-start delay time
output is released to allow the soft start. The soft start time
rises from zero to V
Once C
delay time
and (4) respectively.
VDAC Slew Rate Programming Capacitor C
The slew rate of VDAC down-slope SR
Equation (5), where I
resistor R
slope SR
current of VDAC pin as shown in Figure15 of IR3081A Data Sheet.
SS/DEL
SS/DEL
.
Page 14 of 33
UP
VDAC
t
VccPG
is proportional to that of VDAC down-slope and is given by Equation (7), where I
is chosen, the soft start delay time
is used to compensate VDAC circuit and is determined by Equation (6). The slew rate of VDAC up-
from output voltage (V
O.
C
t
t
t
C
R
SR
VccPG
SSDEL
OCDEL
VDAC
VDAC
t
SS
SINK
SS
UP
SS/DEL
/
DEL
SS/DEL
can be programmed by an external capacitor, which is determined by Equation (1).
=
=
=
=
=
=
is the sink current of VDAC pin as shown in Figure 15 of IR3081A Data Sheet. The
I
C
C
0
C
=
SR
C
SOURCE
SS
5 .
SS
VDAC
I
SS
I
SINK
DOWN
I
CHG
/
+
/
I
OCDISCHG
/
DEL
DEL
programs four different time parameters, i.e. soft start delay time, soft start time,
CHG
DEL
3
V
2 .
C
O
*
*
1 *
VDAC
*
∗
t
3 (
SS
. 0
10
3 .
8 .
115
DOWN
I
−
=
=
2
−
O
CHG
15
) in regulation to Power Good are fixed and shown in Equations (2), (3)
70
C
. 0
=
SS
065
70
*
C
/
VDAC
10
DEL
*
can be programmed by the external capacitor C
SS
V
−
10
40
−
O
/
V
6
DEL
1 *
−
O
*
6
*
and Resistor R
t
10
−
t
SSDEL,
3 .
*
SS
1
. 0
−
) 3 .
6
115
=
the over-current fault latch delay time
C
t
SS
SS
/
DEL
represents the time during which converter voltage
( *
VDAC
70
. 3
*
735
10
−
−
6
V
O
t
SSDEL,
−
1
) 3 .
IR3086APbF
after which the error amplifier
May 13, 2009
(1)
(2)
(3)
(4)
(5)
(6)
(7)
SOURCE
VDAC
OSC
t
OCDEL
as defined in
is the source
according to
, and the