IR3527MTRPBF International Rectifier, IR3527MTRPBF Datasheet - Page 9

• Manufacturer Part Number: IR3527MTRPBF
• Description: IC CTRL XPHASE3 DUAL 24-MLPQ
• Manufacturer: International Rectifier
• Series: XPhase3™r

Specifications of IR3527MTRPBF

• Applications: Processor
• Current - Supply: 8mA
• Voltage - Supply: 8 V ~ 28 V
• Operating Temperature: 0°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: *
• Package: 24-Lead MLPQ
• Circuit: X-Phase Phase IC
• Iout (a): 1.3A Gate Driver
• Pbf: PbF Option Available
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PWM Operation
The PWM comparator is located in the phase IC. Upon receiving the falling edge of a clock pulse, the PWM latch is sets
and the PWM ramp voltage begins to increase. In conjunction, the low side driver is turned off and the high side driver is
turned on after the non-overlap time expires. When the PWM ramp voltage exceeds the error amplifier’s output voltage,
the PWM latch is reset. This turns off the high side driver, turns on the low side driver after the non-overlap time, and
activates the ramp discharge clamp. The clamp drives the PWM ramp voltage to the level set by the share adjust
amplifier until the next clock pulse.
The PWM latch is reset dominant allowing all phases to go to zero duty cycle within a few tens of nanoseconds in
response to a load step decrease. Phases can overlap and go to a 100% duty cycle in response to a load step increase
with turn-on gated by the clock pulses. An error amplifier output voltage greater than the common mode input range of
the PWM comparator results in 100% duty cycle regardless of the voltage of the PWM ramp. This arrangement
guarantees the error amplifier is always in control and can demand 0 to 100% duty cycle as required. It also favors
response to a load step decrease which is appropriate given the low output to input voltage ratio of most systems. The
inductor current will increase much more rapidly than decrease in response to load transients. An additional advantage
of this PWM modulator is that differences in ground or input voltage at the phases have no effect on operation since the
PWM ramps are referenced to VDAC.
Figure 4 depicts PWM operating waveforms under various conditions.
Body Braking
In a conventional synchronous buck converter, the minimum time required to reduce the current in the inductor in
response to a load step decrease is;
The slew rate of the inductor current can be significantly increased by turning off the synchronous rectifier in
response to a load step decrease. The switch node voltage is then forced to decrease until conduction of the
synchronous rectifier’s body diode occurs. This increases the voltage across the inductor from Vout to Vout +
V
decrease is now;
BODYDIODE
PHASE IC
CLOCK
PULSE
PWMRMP
GATEH
GATEL
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. The minimum time required to reduce the current in the inductor in response to a load transient
EAIN
VDAC
TM
STEADY-STATE
OPERATION
Figure 4 - PWM Operating Waveforms
DUTY CYCLE INCREASE
DUE TO LOAD
INCREASE
T
T
SLEW
SLEW
L
L
V
O
( *
( *

DUTY CYCLE DECREASE
DUE TO VIN INCREASE
(FEED-FORWARD)
I
I
V
MAX
MAX
BODYDIODE
V
O


I
I
MIN
MIN
)
)
DUTY CYCLE DECREASE DUE TO LOAD
DECREASE (BODY BRAKING) OR FAULT
(VCCLUV, OCP, VID=11111X)
V3.0
STEADY-STATE
OPERATION
IR3527