IR3527MTRPBF International Rectifier, IR3527MTRPBF Datasheet - Page 2

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IR3527MTRPBF

Manufacturer Part Number
IR3527MTRPBF
Description
IC CTRL XPHASE3 DUAL 24-MLPQ
Manufacturer
International Rectifier
Series
XPhase3™r
Datasheet

Specifications of IR3527MTRPBF

Applications
Processor
Current - Supply
8mA
Voltage - Supply
8 V ~ 28 V
Operating Temperature
0°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
*
Package
24-Lead MLPQ
Circuit
X-Phase Phase IC
Iout (a)
1.3A Gate Driver
Pbf
PbF Option Available
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IR3527MTRPBF
Manufacturer:
IR
Quantity:
20 000
ORDERING INFORMATION
PIN DESCRIPTION
* Samples only
Page 2 of 20
PIN#
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
IR3527MTRPBF
* IR3527MPBF
Part Number
SYMBOL
PHSOUT
BOOST1
BOOST2
GATEH1
GATEL1
GATEL2
ISHARE
CSIN1+
VCCL1
VCCL2
DACIN
PHSIN
CLKIN
PGND
EAIN
PSI1
PSI2
SW1
PIN
PIN DESCRIPTION
Phase1 current sense amplifier non-inverting input and input to debug comparator
PWM comparator input from the error amplifier output of Control IC. Body Braking
mode is initiated if the voltage on this pin is less than V(DACIN) threshold.
Output of the Current Sense Amplifiers are connected to this pin through 3k
resistors. Voltage on this pin is equal to approximately V(DACIN) + 16 [(V
V
a share bus which provides an indication of the average current being supplied by all
the phases. The signal is used by the Control IC for voltage positioning, over-current
protection, and in some cases current reporting. OVP mode is initiated if the voltage
on this pin rises above V(VCCL)- 0.8V.
Reference voltage input from the Control IC. The Current Sense signal and PWM
ramps are referenced to the voltage on this pin.
Input to Phase 1 PSI comparator. Logic low stops the phase from switching (low =
low power state)
Input to Phase 2 PSI comparator. Logic low stops the phase from switching (low =
low power state)
Phase timing clock input.
Phase timing clock output.
Clock input.
Return for Phase1 high-side driver and reference for GATEL1 non-overlap
comparator.
Phase1 High-side driver output and input to GATEL1 non-overlap comparator.
Supply for Phase1 high-side driver. Internal bootstrap synchronous PFET is
connected between this pin and the VCCL1 pin.
Supply for Phase1 low-side driver. Internal bootstrap synchronous PFET is
connected from this pin to the BOOST1 pin.
Phase1 Low-side driver output and input to GATEH1 non-overlap comparator.
Return for low side drivers and reference for GATEH non-overlap comparators.
Phase2 Low-side driver output and input to GATEH2 non-overlap comparator.
Supply for Phase2 low-side driver. Internal bootstrap synchronous PFET is
connected from this pin to the BOOST pin.
Supply for Phase2 high-side driver. Internal bootstrap synchronous PFET is
connected between this pin and the VCCL1 pin.
CSIN1-
) + (V
CSIN2+
(4 x 4 mm body)
(4 x 4 mm body)
– V
24 Lead MLPQ
24 Lead MLPQ
Package
CSIN2-
)]. Connecting all Phase IC ISHARE pins together creates
Order Quantity
100 piece strips
3000 per reel
V3.0
IR3527
CSIN1+

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