IR3529MTRPBF International Rectifier, IR3529MTRPBF Datasheet - Page 18

IC CTRL XPHASE CPU/ASIC 20-MLPQ

IR3529MTRPBF

Manufacturer Part Number
IR3529MTRPBF
Description
IC CTRL XPHASE CPU/ASIC 20-MLPQ
Manufacturer
International Rectifier
Series
XPhase3™r
Datasheet

Specifications of IR3529MTRPBF

Applications
Processor
Current - Supply
2mA
Voltage - Supply
8 V ~ 16 V
Operating Temperature
0°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
*
Package
20-Lead MLPQ
Circuit
X-Phase Phase IC
Iout (a)
4.0A Gate Driver
Pbf
PbF Option Available
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
IR3529MTRPBFTR
LAYOUT GUIDELINES
The following layout guidelines are recommended to reduce the parasitic inductance and resistance of the PCB
layout; therefore, minimizing the noise coupled to the IC.
• Dedicate at least one middle layer for a ground plane, which is then split into signal ground plane (LGND) and
• Separate analog bus (EAIN, DACIN, and IOUT) from digital bus (CLKIN, PSI, PHSIN, and PHSOUT) to
• Connect PGND to LGND pins of each phase IC to the ground tab, which is tied to LGND and PGND planes
• Place current sense resistors and capacitors (R
• Place the decoupling capacitors C
• Place the phase IC as close as possible to the MOSFETs to reduce the parasitic resistance and inductance of
• Place the input ceramic capacitors close to the drain of top MOSFET and the source of bottom MOSFET. Use
• There are two switching power loops. One loop includes the input capacitors, top MOSFET, inductor, output
power ground plane (PGND).
reduce the noise coupling.
respectively through vias.
inductor current sense wires, but separate the two wires by ground polygon. The wire from the inductor
terminal to CSIN- should not cross over the fast transition nodes, i.e., switching nodes, gate drive outputs,
and bootstrap nodes.
IC respectively.
the gate drive paths.
combination of different packages of ceramic capacitors.
capacitors and the load; another loop consists of bottom MOSFET, inductor, output capacitors and the load.
Route the switching power paths using wide and short traces or polygons; use multiple vias for connections
between layers.
Page 18 of 22
VCC
and C
VCCL
CS
and C
as close as possible to VCC and VCCL pins of the phase
CS
) close to phase IC. Use Kelvin connection for the
February 12, 2010
IR3529

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