STM6505SCABDG6F STMicroelectronics, STM6505SCABDG6F Datasheet - Page 11

• Manufacturer Part Number: STM6505SCABDG6F
• Description: IC SMART RESET DUAL PB 8TDFN
• Manufacturer: STMicroelectronics
• Series: Smart Reset™r
• Type: Smart Resetr

Specifications of STM6505SCABDG6F

• Number Of Voltages Monitored: 1
• Output: Open Drain or Open Collector
• Reset: Active Low
• Reset Timeout: 240 ms Minimum
• Voltage - Threshold: 2.925V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-TDFN
• Current - Supply: 2.3µA
• Voltage - Supply: 1 V ~ 5.5 V
• Applications: General Purpose
• Supply Voltage (max): 7 V
• Supply Voltage (min): - 0.3 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Switches: Dual
• Supply Current: 2.2 uA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-10532-2

STM6502, STM6503, STM6504, STM6505
1.2.5
Note:
1.2.6
The SRE pin is active-high, immediate and independent reset input that includes an edge
trigger with debounce delay t
The triggering edge must be a high-to-low or low-to-high transition with a slew-rate faster
than 1 V/µs typ.
Figure 8.
STM6505 only
This pin controls the setup time before the push-button action is validated by the reset
output. It is connected to an external capacitor (C
desired value of the setup time (t
Calculated t
Table 3.
1. At 25 °C. Example calculations based on an ideal capacitor. During application design and component
2. In case of repeated activations of the t
Edge-triggered Smart Reset input (SRE pin) – STM6504 only
Adjustable delay of Smart Reset input (SRC pin) – STM6502 and
Calculated C
selection it should be considered that the current flowing into the external t
(C
used and placed as close as possible to the SRC pin. Also an adequate low-leakage PCB environment
should be ensured to prevent t
is 0.01 µF.
activations to fully discharge C
Independent
SRE
value [µF]
RST
SR0
SRC
0.2
0.3
0.6
) is on the order of 100 nA, therefore a low-leakage capacitor (ceramic or film capacitor) should be
1
No debounce
SRC
STM6504 timing
t
SRC
SRC
=> t REC timer reset
t < t DEBOUNCE
and C
programmed by an ideal external capacitor – STM6502 and STM6505
SRC
Min.
10
examples are given in
2
3
6
SRC
SRC
DEBOUNCE
Doc ID 16101 Rev 6
, so that the next t
accuracy from being affected. A recommended minimum value of C
t REC
SRC
SRC
=> no output response
Setup delay t
t DEBOUNCE are ignored)
).
timer, an interval of 10 ms min. is needed between the
(rising edges within
t < t SRC
on the falling edge.
t DEBOUNCE
Typ.
3.75
12.5
2.5
7.5
SRC
SRC
is as specified.
SRC
Table
[s]
), which is tied to ground to provide the
(1)(2)
3. Refer also to
t REC
Max.
3.0
4.5
SRC
15
9
programming capacitor
t SRC
Table
Closest common
C
t REC
SRC
6.
Description
value [µF]
0.22
0.33
0.56
1
AM00328V2
SRC
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