LTC3577EUFF#PBF Linear Technology, LTC3577EUFF#PBF Datasheet - Page 44

• Manufacturer Part Number: LTC3577EUFF#PBF
• Description: IC PWR MANAGEMENT HANDHELD 44QFN
• Manufacturer: Linear Technology

Specifications of LTC3577EUFF#PBF

• Applications: Handheld/Mobile Devices
• Voltage - Supply: 4.35 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -

OPERATION
LTC3577/LTC3577-1
Upon entering the PUP1 state, the pushbutton circuitry
will sequence up the three step-down switching regula-
tors in numerical order. LDO1, LDO2 and LED backlight
are enabled via I
sequence of the pushbutton. Five seconds after entering
the PUP1 state, the pushbutton circuitry will transition into
the power-on (PON) state. Note that the PWR_ON input
must be brought high before entering the PON state if the
part is to remain in the PON state.
PWR_ON going low, or V
lockout (V
to leave the PON state and enter the power-down (PDN2)
state. The PDN1 and PDN2 states reset the I
effectively shutting down the LDOs and LED backlight as
well as disable all switching regulators together. The one
second delay before leaving either power-down state allows
all LTC3577 generated supplies to power down completely
before they can be re-enabled.
The same three events used to exit HR are also used to
exit the POFF state and enter PUP2 state. The PUP2 state
operates in the same manner as the PUP1 state previously
described.
The hard reset (HRST) event is generated by pressing and
holding the pushbutton (ON input low) for 5 seconds. For
a valid HRST event to occur the initial pushbutton applica-
tion must start in the PUP1, PUP2 or PON state, but can
end in any state. If a valid HRST event is present in PON,
PDN2 or POFF , then the state machine will transition to the
PDN1 state and subsequently transition to the HR state
one second later.
In the HR state all supplies are disabled and the Power-
Path circuitry is placed in an ultralow quiescent state to
minimize battery drain. If no external charging supply
is present (WALL or V
down disconnecting V
consumption in the HR state makes it ideal for shipping
or long term storage, minimizing battery drain. In the HR
state the battery monitoring circuit wakes up the charger
every 150ms to sample the NTC thermistor for overtem-
perature battery condition. To sample the NTC thermistor,
the ideal diode is turned on charging V
44
OUT
UVLO) threshold will cause the state machine
2
C and do not take part in the power-up
OUT
BUS
OUT
) then the ideal diode is shut
from BAT. The ultralow power
dropping to its undervoltage
OUT
2
up to V
C registers
BAT
.
As a consequence, any system load on V
as a load on V
disconnect the system load from V
Power-Up via Pushbutton Timing
The timing diagram, Figure 19, shows the LTC3577 power-
ing up through application of the external pushbutton. For
this example the pushbutton circuitry starts in the POFF or
HR state with a battery connected and all buck disabled.
Pushbutton application (ON low) for 400ms transitions
the pushbutton circuitry into the PUP state which brings
WAKE Hi-Z for 5 seconds. WAKE going Hi-Z sequences
buck1-3 up in numerical order. WAKE will stay Hi-Z if
PWR_ON is driven high before the 5 seconds PUP period
is over. If PWR_ON is low or goes low after the 5 second
period, WAKE will go low and buck1-3 will be shut down
together. PG_DCDC is asserted once all enabled bucks are
within 8% of their regulation voltage for 230ms.
PBSTAT does not go low impedance with ON going low
during the power-up pushbutton application. PBSTAT will
go low impedance with ON on subsequent pushbutton
applications once in the PUP1, PUP2 or PON states.
The LDOs and LED backlight can be enabled and disabled
at any time via I
The PWR_ON input can be driven via a μP/μC or by one of
the buck outputs through a high impedance (100kΩ typ)
to keep the bucks enabled as described above.
PG_DCDC
PWR_ON
BUCK1-3
ON (PB)
STATE
PBSTAT
WAKE
V
BAT
BUS
Figure 19. Power-Up via Pushbutton Timing
BAT
2
POFF/HR
C once in the PUP1, PUP2 or PON states.
. Figure 26 shows an optional circuit to
400ms
1 2 3
BUCKS SEQUENCE UP
PUP2/PUP1
OUT
230ms
.
OUT
will show up
5SEC
PON
3755 F19
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