BUK1M200-50SGTD,11 NXP Semiconductors, BUK1M200-50SGTD,11 Datasheet - Page 6
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BUK1M200-50SGTD,11
Manufacturer Part Number
BUK1M200-50SGTD,11
Description
TOPFET QUAD 50V 20-SOIC
Manufacturer
NXP Semiconductors
Series
TOPFET™r
Type
Low Sider
Datasheet
1.BUK1M200-50SGTD11.pdf
(15 pages)
Specifications of BUK1M200-50SGTD,11
Input Type
Non-Inverting
Number Of Outputs
4
On-state Resistance
150 mOhm
Current - Output / Channel
2.7A
Current - Peak Output
6.1A
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Operating Temperature
-
Other names
934057351115
BUK1M200-50SGTDT/R
BUK1M200-50SGTDT/R
BUK1M200-50SGTDT/R
BUK1M200-50SGTDT/R
Philips Semiconductors
6. Static characteristics
Table 5:
Limits are valid for 40 C
[1]
[2]
[3]
[4]
[5]
9397 750 10955
Product data
Symbol
Off-state output characteristics
V
I
On-state output characteristic
R
Input characteristics
V
I
V
t
V
R
Overload protection characteristic
I
Overtemperature protection characteristic
T
Source drain diode characteristic
V
DSS
IS
rst(latch)
D(th)(trip)
DS(CL)
IS(th)
IS(rst)
IS(CL)
j(th)
SD
DSon
IG
The supply for the logic and overload protection is taken from the input.
The input voltage below which the overload protection circuits will be reset.
To reset the protection circuitry from the latched state, V
Not directly measurable from device terminals.
The TOPFET switches off to protect itself when one of the overload thresholds is exceeded. It remains latched off until reset by the
input.
Parameter
drain-source clamping voltage
drain-source leakage current
drain-source on-state resistance
input-source threshold voltage
input supply current
input-source reset voltage
latch reset time
input-source clamping voltage
input-gate resistance
drain current trip threshold
threshold junction temperature
source-drain (diode forward)
voltage
Static characteristics
[1]
T
sp
+150 C and typical values for T
[5]
Conditions
V
V
V
V
I
V
normal operation
protection latched
t
I
4 V
4 V
I
D
rst
I
S
IS
IS
IS
IS
DS
= 1.5 mA;
T
T
T
V
V
V
V
T
Figure 10
= 100 mA
= 2 A; V
Rev. 01 — 31 March 2003
0.01;
sp
sp
sp
sp
= 0 V; I
= 0 V; I
= 0 V; V
IS
IS
IS
IS
= 5 V; I
100 s;
4 V; t
V
= 25 C;
V
= 25 C;
= 25 C;
= 25 C;
= 5 V
= 4 V
= 5 V
= 3 V;
IS
IS
IS
is reduced from 5 V to 1 V.
Figure 18
IS
D
D
p
5.5 V
5.5 V;
DS
D
Figure 15
Figure 14
= 10 mA
= 200 mA; t
= 0 V; t
Figure 17
= 1 mA
Figure 11
300 s;
= 40 V
Figure 19
Figure 8
Figure 13
Figure 12
sp
p
= 25 C unless otherwise specified.
= 300 s
and
and
p
0.01;
16
300 s;
9
BUK1M200-50SGTD
Quad channel logic level TOPFET
[2]
[3]
[4]
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Min
50
50
-
-
-
-
0.6
1.1
100
80
1.4
0.7
1.5
10
5.5
-
4
3
150
-
Typ
-
62
-
0.05
-
150
-
1.6
220
195
2
1.1
2
40
-
2.5
6.1
6.1
170
0.83
Max
-
70
100
10
380
200
2.4
2.1
400
330
2.5
1.5
2.5
100
8.5
-
8
9
-
1.1
Unit
V
V
m
m
V
V
mA
mA
V
V
k
A
A
V
C
6 of 15
A
A
A
A
s