VNQ830M STMicroelectronics, VNQ830M Datasheet - Page 19

• Manufacturer Part Number: VNQ830M
• Description: IC DRIVER HISIDE QUAD 28-SOIC
• Manufacturer: STMicroelectronics
• Type: High Sider

Specifications of VNQ830M

• Input Type: Non-Inverting
• Number Of Outputs: 4
• On-state Resistance: 60 mOhm
• Current - Peak Output: 10.5A
• Voltage - Supply: 5.5 V ~ 36 V
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• Supply Current: 40 mA
• Maximum Power Dissipation: 6250 mW
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Current - Output / Channel: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

3.1.2
3.2
3.3
VNQ830M
where - I
maximum rating section of the device datasheet.
Power dissipation in R
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where I
maximum on-state currents of the different devices.
Please note that, if the microprocessor ground is not shared by the device ground, then the
R
values. This shift will vary depending on how many devices are ON in the case of several
high side drivers sharing the same R
If the calculated power dissipation requires the use of a large resistor, or several devices
have to share the same resistor, then ST suggests using solution 2 below.
Solution 2: a diode (D
A resistor (R
an inductive load. This small signal diode can be safely shared amongst several different
HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in
the input threshold and the status output values if the microprocessor ground is not common
with the device ground. This shift will not vary if more than one HSD shares the same
diode/resistor network. Series resistor in INPUT and STATUS lines are also required to
prevent that, during battery voltage transient, the current exceeds the Absolute Maximum
Rating. Safest configuration for unused INPUT and STATUS pin is to leave them
unconnected.
Load dump protection
D
V
line that are greater than those shown in the ISO T/R 7637/1 table.
MCU I/O protection
If a ground protection network is used and negative transients are present on the V
the control pins will be pulled negative. ST suggests to insert a resistor (R
prevent the µC I/O pins from latching up.
The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os:
CC
GND
ld
is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
P
maximum DC rating. The same applies if the device is subject to transients on the V
- V
will produce a shift (I
D
CCpeak
= ( - V
GND
GND
is the DC reverse ground pin current and can be found in the absolute
CC
/ I
latchup
)
= 1kΩ) should be inserted in parallel to D
2
/ R
GND
GND
≤ R
prot
(when V
S(on)max
GND
≤ (V
OHµC
) in the ground line
CC
* R
GND
- V
< 0 during reverse battery situations) is:
GND
IH
.
) in the input thresholds and the status output
- V
GND
) / I
IHmax
S(on)max
GND
if the device will be driving
becomes the sum of the
Application information
prot
) in line to
CC
line,
19/28
CC