VN772K-E STMicroelectronics, VN772K-E Datasheet - Page 27

• Manufacturer Part Number: VN772K-E
• Description: IC SSR QUAD FOR H BRIDGE 28SOIC
• Manufacturer: STMicroelectronics
• Type: H Bridger

Specifications of VN772K-E

• Input Type: Non-Inverting
• Number Of Outputs: 4
• On-state Resistance: 60 mOhm
• Current - Output / Channel: 9A
• Voltage - Supply: 5.5 V ~ 36 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• Device Type: Half Bridge
• Module Configuration: High And Low Side
• Peak Output Current: 9A
• Output Resistance: 0.12ohm
• Input Delay: 30µs
• Output Delay: 30µs
• Supply Voltage Range: 5.5V To 36V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Peak Output: -

VN772K
4.2
Table 19.
4.2.1
4.2.2
4.2.3
4.2.4
b. Calculation is valid in any dynamic operating condition. Pd values set by user.
HS
On
Off
1
HS
Off
On
2
Thermal calculation in clockwise and anti-clockwise
operation in steady state mode
Thermal calculation in clockwise and anti-clockwise operation in steady state mode
Thermal resistances definition
Values according to the PCB heatsink area.
R
in on-state)
R
R
high side and low side chips
R
Thermal calculation in transient mode
T
T
T
Single pulse thermal impedance definition
Values according to the PCB heatsink area.
Z
Z
Z
high side and low side chips
Z
Pulse calculation formula
where δ = t
Z
jHS12
jLS3
jLS4
thHS
thLS
thHSLS
thLSLS
thHS
thLS
thHSLS
thLSLS
THδ
LS
Off
On
3
= Z
= Z
= Z
= R
= high side chip thermal impedance junction to ambient
= R
= Z
=
= Z
= R
= Z
= R
thHSLS
thHSLS
thLS3
R
thLS3
thHS1
thHS
LS
On
Off
TH
thLS3LS4
P
thHS12LS3
thLS3LS4
thHS1LS4
/T
4
= Z
⋅
= R
x P
= R
δ
x P
x P
+
thLS4
P
P
dHS12
thLS4
Z
thHS2
dHS12
dHS12
dHS1
dHS2
= mutual thermal impedance junction to ambient between low side chips
THtp
= mutual thermal resistance junction to ambient between low side chips
= R
= Z
R
R
= low side chip thermal impedance junction to ambient
thHSLS
thHSLS
= low side chip thermal resistance junction to ambient
x R
x R
= high side chip thermal resistance junction to ambient (HS
+ Z
thHS12LS4
thHS2LS3
(
+ Z
+ Z
1 δ
T
thHS
thHS
jHS12
–
thHSLS
thLS
thLSLS
+ T
+ T
)
Doc ID 12535 Rev 3
+ P
+ P
amb
amb
x P
= mutual thermal resistance junction to ambient between
= mutual thermal impedance junction to ambient between
dLS4
dLS3
x (P
x P
dLS3
dLS3
x
x
dLS3
+ Z
P
P
+ Z
+ P
thLSLS
dHS1
dHS2
x R
thLS
dLS4
x R
(b)
x R
x R
thLSLS
thLS
x P
x P
) + T
T
thHSLS
thHSLS
jLS3
dLS4
dLS4
+ T
+ T
amb
amb
+ P
+ P
amb
+ T
+ T
dLS4
dLS3
amb
amb
P
P
dHS1
dHS2
R
x R
x R
R
thLSLS
thLS
thHSLS
thHSLS
Thermal data
T
jLS4
+ T
+ T
amb
+ P
+ P
amb
1
or HS
dLS4
dLS3
27/33
x
x
2