TLE7231G Infineon Technologies, TLE7231G Datasheet - Page 20

• Manufacturer Part Number: TLE7231G
• Description: IC DRIVER SPI 4CH LS DSO-14
• Manufacturer: Infineon Technologies
• Type: Low Sider

Specifications of TLE7231G

• Input Type: SPI
• Number Of Outputs: 4
• On-state Resistance: 1 Ohm
• Current - Output / Channel: 320mA
• Current - Peak Output: 950mA
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: DSO-14
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SP000297859; TLE7231G; TLE7231GTR

9
The diagnosis and control interface is based on a serial peripheral interface (SPI).
The SPI is a full duplex synchronous serial slave interface, which uses four lines: SO, SI, SCLK and CS. Data is
transferred by the lines SI and SO at the data rate given by SCLK. The falling edge of CS indicates the beginning
of a data access. Data is sampled in on line SI at the falling edge of SCLK and shifted out on line SO at the rising
edge of SCLK. Each access must be terminated by a rising edge of CS. A modulo 8 counter ensures that data is
taken only, when a multiple of 8 bit has been transferred. The interface provides daisy chain capability.
Figure 9
The SPI protocol is described in
9.1
CS - Chip Select:
The system micro controller selects the TLE7231G by means of the CS pin. Whenever the pin is in low state, data
transfer can take place. When CS is in high state, any signals at the SCLK and SI pins are ignored and SO is
forced into a high impedance state.
CS High to Low transition:
•
•
Datasheet
SCLK
The diagnosis information is transferred into the shift register.
SO changes from high impedance state to high or low state depending on the logic OR combination between
the transmission error flag (TER) and the signal level at pin SI. As a result, even in daisy chain configuration,
a high signal indicates a faulty transmission. The transmission error flag is set after any kind of reset, so a reset
between two SPI commands is indicated. For details, please refer to
available to the first rising edge of SCLK.
SO
CS
time
SI
Serial Peripheral Interface (SPI)
Serial Peripheral Interface
SPI Signal Description
CS
MSB
MSB
6
6
Section
5
5
9.3. It is reset to the default values after power-on reset.
4
4
3
3
20
2
2
SPI Driver for Enhanced Relay Control
1
1
Figure
LSB
LSB
Serial Peripheral Interface (SPI)
10. This information stays
SPIDER - TLE7231G
Rev. 1.0, 2008-02-28
SPI.emf