MC33883DW Freescale Semiconductor, MC33883DW Datasheet - Page 3

• Manufacturer Part Number: MC33883DW
• Description: IC H-BRIDGE PRE-DRIVER 20-SOIC
• Manufacturer: Freescale Semiconductor

Specifications of MC33883DW

• Configuration: H Bridge
• Input Type: Non-Inverting
• Delay Time: 200ns
• Current - Peak: 2A
• Number Of Configurations: 1
• Number Of Outputs: 4
• Voltage - Supply: 5.5 V ~ 55 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• High Side Voltage - Max (bootstrap): -

Table 1. 20-SOICW Terminal Definitions
page
Analog Integrated Circuit Device Data
Freescale Semiconductor
Terminal
A functional description of each terminal can be found in the
10
11
12
13
14
15
16
17
18
19
20
10.
1
2
3
4
5
6
7
8
9
VCC
C2
CP_OUT
SRC_HS1
GATE_HS
1
IN_HS1
IN_LS1
GATE_LS1 Gate 1 Output Low Side
GND1
LR_OUT
VCC2
GND_A
C1
GND2
GATE_LS2 Gate 2 Output Low Side
IN_LS2
IN_HS2
GATE_HS
2
SRC_HS2
G_EN
Terminal
Name
Supply Voltage 1
Charge Pump Capacitor
Charge Pump Out
Source 1 Output High Side
Gate 1 Output High Side
Input High Side 1
Input Low Side 1
Ground 1
Linear Regulator Output
Supply Voltage 2
Analog Ground
Charge Pump Capacitor
Ground 2
Input Low Side 2
Input High Side 2
Gate 2 Output High Side
Source 2 Output High Side
Global Enable
Formal Name
Figure 3. 33883 20-SOICW Terminal Connections
GATE_HS1
GATE_LS1
SRC_HS1
CP_OUT
LR_OUT
IN_HS1
TERMINAL CONNECTIONS
IN_LS1
GND1
VCC
C2
Device power supply 1.
External capacitor for internal charge pump.
External reservoir capacitor for internal charge pump.
Source of high-side 1 MOSFET
Gate of high-side 1 MOSFET.
Logic input control of high-side 1 gate (i.e., IN_HS1 logic HIGH = GATE_HS1 HIGH).
Logic input control of low-side 1 gate (i.e., IN_LS1 logic HIGH = GATE_LS1 HIGH).
Gate of low-side 1 MOSFET.
Device ground 1.
Output of internal linear regulator.
Device power supply 2.
Device analog ground.
External capacitor for internal charge pump.
Device ground 2.
Gate of low-side 2 MOSFET.
Logic input control of low-side 2 gate (i.e., IN_LS2 logic HIGH = GATE_LS2 HIGH).
Logic input control of high-side 2 gate (i.e., IN_HS2 logic HIGH = GATE_HS2 HIGH).
Gate of high-side 2 MOSFET.
Source of high-side 2 MOSFET.
Logic input Enable control of device (i.e., G_EN logic HIGH = Full Operation, G_EN
logic LOW = Sleep Mode).
1
2
3
4
5
6
7
8
9
10
FUNCTIONAL TERMINAL DESCRIPTION
20
19
18
17
16
15
14
13
12
11
G_EN
SRC_HS2
GATE_HS2
IN_HS2
IN_LS2
GATE_LS2
GND2
C1
GND_A
VCC2
Definition
TERMINAL CONNECTIONS
section beginning on
33883
3