IR22141SS International Rectifier, IR22141SS Datasheet - Page 12

• Manufacturer Part Number: IR22141SS
• Description: IC DRIVER HALF BRIDGE SGL 24SSOP
• Manufacturer: International Rectifier

Specifications of IR22141SS

• Configuration: Half Bridge
• Input Type: Non-Inverting
• Delay Time: 440ns
• Current - Peak: 2A
• Number Of Configurations: 1
• Number Of Outputs: 2
• High Side Voltage - Max (bootstrap): 1200V
• Voltage - Supply: 11.5 V ~ 20 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 24-SSOP
• Family Hvic: General Purpose HVICs
• Channels: 2
• Topology: Half Bridge
• Application: General Purpose / Motor Control
• Voffset: 1200
• Io+ (ma): 2000
• Io- (ma): 3000
• Separate Power And Logic Ground: Yes
• Uvlo: Vcc / Vbs
• Vbsuv+ / Vccuv+ Min (v): 9.3
• Vbsuv+ / Vccuv+ Typ (v): 10.2
• Vbsuv+ / Vccuv+ Max (v): 11.4
• Vbsuv- / Vccuv- Min (v): 8.7
• Vbsuv- / Vccuv- Typ (v): 9.3
• Vbsuv- / Vccuv- Max (v): 10.3
• Dt / Sdt Min (ns): 5700
• Dt / Sdt Typ (ns): 9250
• Dt / Sdt Max (ns): 13500
• T On Min (ns): 220
• T On Typ (ns): 440
• T On Max (ns): 660
• T Off Min (ns): 220
• T Off Typ (ns): 440
• T Off Max (ns): 660
• Fault Reporting: Yes
• Package: 24 Lead
• Part Status: Active & Preferred
• Special Features: Soft Shutdown and Desaturation Detection
• For Use With: IRMD2214SS - KIT DESIGN EVAL BOARD IR2214SSIRMD22141SS - KIT DESIGN EVAL BOARD/IR22141SS
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *IR22141SS

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1.1 Start-Up Sequence
At power supply start-up, it is recommended to keep the
FLT_CLR pin active until the supply voltages are
properly established. This prevents spurious diagnostic
signals being generated.
When the bootstrap supply topology is used for
supplying the floating high side stage, the following start-
up sequence is recommended (see also Fig. 12):
A minimum 15 µs LIN and FLT-CLR pulse is required.
A minimum supply voltage of 8V is recommended for the
driver to operate safely under switching conditions at VS
pin. At lower supply the gate driving capability decreases
and might become not sufficient to counteract switching
charge injected to the outputs.
1.2 Normal Operation Mode
After the start-up sequence has completed, the device
becomes fully operative (see grey blocks in the State
Diagram).
HIN and LIN
accordingly, while the input logic monitors the input
signals and deadtime (DT) prevent shoot-through events
from occurring.
1.3 Shutdown
The system controller can asynchronously command the
Hard Shutdown (HSD) through the 3.3 V compatible
CMOS I/O FAULT/SD pin. This event is not latched.
In a multi-phase system, FAULT/SD signals are or-ed so
the controller or one of the gate drivers can force the
simultaneous shutdown of the other gate drivers through
the same pin.
1.
2.
3.
4.
5.
Set V
Set FLT_CLR pin to HIGH level,
Set LIN pin to HIGH level and charge the
bootstrap capacitor,
Release LIN pin to LOW level,
Release FLT_CLR pin to LOW level.
1 Features Description
FLT_CLR
Figure 12 Start-Up Sequence
CC
VCC
,
LIN
LO
produce driver outputs to switch
12
1.4 Fault Management
The IR21141/IR22141 is able to manage supply failure
(undervoltage lockout) and transistor desaturation (on
both the low and high side switches).
1.4.1 Undervoltage (UV)
The undervoltage protection function disables the
driver’s output stage which prevents the power device
from being driven when the input voltage is less than the
undervoltage threshold. Both the low side (V
and the floating side (V
dedicate undervoltage function.
An
V
the FAULT/SD pin low (see FAULT/SD section and Fig.
14). This event disables both the low side and floating
drivers and the diagnostic signal holds until the
undervoltage condition is over. The fault condition is not
latched and the FAULT/SD pin is released once V
becomes higher than UV
The V
the floating driver. Undervoltage on V
the low side driver from activating its output nor does it
generate diagnostic signals. The V
condition (V
stage in the low state. V
threshold to return the device to its normal operating
mode. To turn on the floating driver, H
asserted high (rising edge event on H
1.4.2 Power Devices Desaturation
Different causes can generate a power inverter failure
(phase
conditions induced by the load, etc.). In all of these fault
conditions, a large increase in current results in the
IGBT.
The IR21141/IR22141 fault detection circuit monitors the
IGBT emitter to collector voltage (V
voltage diode is connected between the IGBT’s collector
and the ICs DSH or DSL pins). A high current in the
IGBT may cause the transistor to desaturate; this
condition results in an increase of V
Once in desaturation, the current in the power transistor
can be as high as 10 times the nominal current.
Whenever the transistor is switched off, this high current
generates relevant voltage transients in the power stage
that need to be smoothed out in order to avoid
destruction (by over-voltage). The gate driver is able to
control the transient condition by smoothly turning off the
desaturated transistor with its integrated soft shutdown
(SSD) protection.
1.4.3 Desaturation Detection: DSH/L Function
Figure 13 shows the structure of the desaturation
sensing and soft shutdown block. This configuration is
the same for both the high and low side output stages.
CC
< UV
undervoltage
BS
undervoltage protection works by disabling only
and/or
VCC-
BS
) generates a diagnostic signal by forcing
IR21141/IR22141SSPbF
< UV
rail
event
VBS-
supply
BS
VCC+
) latches the high side output
supplied) are controlled by a
BS
on
.
© 2009 International Rectifier
must exceed the UV
short-circuit,
the
CE
CE
BS
IN
.
) (an external high
V
is required).
BS
does not prevent
CC
IN
undervoltage
must be re-
CC
pin
supplied)
overload
(when
VBS+
CC