MCZ33937AEK Freescale Semiconductor, MCZ33937AEK Datasheet - Page 11

• Manufacturer Part Number: MCZ33937AEK
• Description: IC PRE-DRIVER 3PH ENH 54-SOIC
• Manufacturer: Freescale Semiconductor
• Series: SMARTMOS™r
• Type: 3 Phase Pre-Driverr

Specifications of MCZ33937AEK

• Configuration: 3 Phase Bridge
• Input Type: Non-Inverting
• Delay Time: 265ns
• Current - Peak: 600mA
• Number Of Configurations: 1
• Number Of Outputs: 3
• High Side Voltage - Max (bootstrap): 15V
• Voltage - Supply: 8 V ~ 40 V
• Operating Temperature: -40°C ~ 135°C
• Mounting Type: Surface Mount
• Package / Case: 54-SOIC (7.5mm Width) Exposed Pad, 54-eSOIC, 54-HSOIC
• Supply Current: 12 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 4. Static Electrical Characteristics (continued)
values noted reflect the approximate parameter means at T
Analog Integrated Circuit Device Data
Freescale Semiconductor
OVER-CURRENT COMPARATOR
HOLD OFF CIRCUIT
PHASE COMPARATOR
DESATURATION DETECTOR
CURRENT SENSE AMPLIFIER
Notes
Common Mode Input Range
Input Offset Voltage
Over-current Comparator Threshold Hysteresis
Output Voltage
Hold Off Current (At Each GATE Pin)
High Level Input Voltage Threshold
Low Level Input Voltage Threshold
High Level Output Voltage at I
Low Level Output Voltage at I
High Side Source Input Resistance
Desaturation Detector Threshold
Recommended External Series Resistor (See
Recommended External Feedback Resistor (See
Maximum Input Differential Voltage (See
Input Common Mode Range
Input Offset Voltage
Input Offset Voltage Drift
Input Bias Current
21.
22.
23.
24.
25.
26.
27.
Characteristics noted under conditions 8.0 V
High Level at I
Low Level at I
3.0 V < V
Limited by the Output Voltage Dynamic Range
V
R
V
ID
CM
S
This parameter is a design characteristic, not production tested.
As long as one input is in the common mode range there is no phase inversion on the output.
The hold off circuit is designed to operate over the full operating range of V
production test. Hold off is activated at V
Desaturation is measured as the voltage drop below V
High Side FET. See
As long as one input is within V
will not cause a phase inversion on the output.
Input resistance is impedance from High Side source and is referenced to V
The current sense amplifier is unity gain stable with a phase margin of approximately 45°. See
= 1.0 k , V
= V
= 2.0 V
AMP_P
SUP
< 40 V
OL
- V
OH
CM
= 500 µA
AMP_N
= -500 µA
= 0.0 V
(23)
(21)
Figure
Characteristic
(22)
(21),
OL
OH
(25)
= 500 µA
(24)
= -500 µA
5.
(21),
CM
(26)
the output is guaranteed to have the correct phase. Exceeding the common mode rails on one input
Figure
Figure
THRST
(21)
9)
Figure
9)
V
or V
PWR
9)
THVLS.
(27)
SUP
= V
, thus the threshold is compared to the drain-source voltage of the external
SUP
A
= 25°C under nominal conditions, unless otherwise noted.
40 V -40 C
V
V
Symbol
V
OC_HYST
V
V
V
I
DES_TH
OS_OC
V
V
HOLD
V
V
V
V
R
V
IH_TH
IL_TH
R
V
OS
R
CM
I
CM
OH
OH
OS
OL
OL
FB
b
IN
ID
S
SUP
/ T
SS
. Approximate tolerance is
. The specification indicates the conditions used in
T
A
0.85 V
0.5 V
0.3 V
0.85 V
-800
-200
135 C, unless otherwise noted. Typical
Min
-0.5
2.0
-50
1.2
5.0
-15
50
10
–
–
–
–
–
STATIC ELECTRICAL CHARACTERISTICS
SUP
SUP
DD
DD
Figure
ELECTRICAL CHARACTERISTICS
Typ
-10
1.4
1.0
40
10.
–
–
–
–
–
–
–
–
–
–
–
–
–
–
0.65 V
0.45 V
V
DD
+800
+200
Max
V
V
300
300
+15
0.5
0.5
1.6
3.0
50
15
DD
DD
–
–
–
-0.02
SUP
SUP
µV/°C
Unit
mV
mV
mV
mV
µA
k
k
k
nA
V
V
V
V
V
V
V
V
33937
11