ADP3419JRMZ-REEL ON Semiconductor, ADP3419JRMZ-REEL Datasheet - Page 8

• Manufacturer Part Number: ADP3419JRMZ-REEL
• Description: IC MOSFET DVR DUAL BOOTST 10MSOP
• Manufacturer: ON Semiconductor
• Type: High Side/Low Sider

Specifications of ADP3419JRMZ-REEL

• Configuration: High and Low Side, Synchronous
• Input Type: PWM
• Delay Time: 32ns
• Current - Peak: 1A
• Number Of Configurations: 1
• Number Of Outputs: 2
• High Side Voltage - Max (bootstrap): 30V
• Voltage - Supply: 4.6 V ~ 6 V
• Operating Temperature: 0°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Number Of Drivers: 2
• Driver Configuration: Invert/Non-Invert
• Driver Type: High and Low Side
• Rise Time: 35ns
• Fall Time: 25ns
• Propagation Delay Time: 70ns
• Operating Supply Voltage (max): 6V
• Output Resistance: 1.7Ohm
• Operating Supply Voltage (min): 4.6V
• Operating Temp Range: 0C to 100C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 10
• Supply Voltage (min): 4.6 V
• Supply Current: 1.5 mA
• Maximum Operating Temperature: + 100 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADP3419JRMZ-REEL; ADP3419JRMZ-REELTR

When DRVLSD is high, the low-side driver is enabled and
controlled by the driver signals, as previously described.
Low-Side Driver Timeout
and turns off the Q1 high-side switch with a few 10 ns delay
(t
When Q1 is turned off, DRVL is allowed to go high, Q2 turns
on, and the SW node voltage collapses to zero. But in a fault
condition such as a high-side Q1 switch drain-source short
circuit, the SW node cannot fall to zero, even when DRVH
goes low. The ADP3419 has a timer circuit to address this
scenario. Every time the IN goes low, a DRVL on-time delay
timer is triggered. If the SW node voltage does not trigger a
low-side turn-on, the DRVL on-time delay circuit does it
instead, when it times out with t
turned on, that is, its drain is shorted to the source, Q2 turns
on and creates a direct short circuit across the V
rail. The crowbar action causes the fuse in the V
path to open. The opening of the fuse saves the load (CPU)
from potential damage that the high-side switch short circuit
could have caused.
Crowbar Function
the ADP3419 includes a CROWBAR input pin to provide a
means for additional overvoltage protection. When
CROWBAR goes high, the ADP3419 turns off DRVH and
turns on DRVL. The crowbar logic overrides the overlap
protection circuit, the shutdown logic, the DRVLSD logic,
and the UVLO protection on DRVL. Thus, the crowbar
function maximizes the overvoltage protection coverage in
the application. The CROWBAR can be either driven by the
CLAMP pin of buck controllers, such as the ADP3422,
ADP3203, ADP3204, or ADP3205, or controlled by an
independent overvoltage monitoring circuit.
Application Information
Supply Capacitor Selection
bypass capacitor is recommended to reduce the noise and to
supply some of the peak currents drawn. Use a 10 mF or
Table 1. ADP3419 Truth Table
CROWBAR
* = Don’t Care.
pdlDRVH
When DRVLSD is low, the low-side driver stays low.
In normal operation, the DRVH signal tracks the IN signal
In addition to the internal low-side drive time-out circuit,
For the supply input (VCC) of the ADP3419, a local
H
H
L
L
L
L
L
L
) following the falling edge of the input signal.
UVLO
H
H
L
L
L
L
L
L
SD
H
H
H
H
L
*
*
*
DRVLSD
H
H
L
L
*
*
*
*
SW(TO)
IN
H
H
L
L
*
*
*
*
delay. If Q1 is still
DRVH
H
H
DCIN
L
L
L
L
L
L
DCIN
voltage
current
http://onsemi.com
DRVL
H
H
H
L
L
L
L
L
8
4.7 mF multilayer ceramic (MLC) capacitor. MLC
capacitors provide the best combination of low ESR and
small size, and can be obtained from the following vendors.
Bootstrap Circuit
(C
Selection of these components can be done after the
high-side MOSFET has been chosen. The bootstrap
capacitor must have a voltage rating that is able to handle at
least 5.0 V more than the maximum supply voltage. The
capacitance is determined by:
Q
DV
MOSFET drive.
total gate charge of about 36 nC. For an allowed droop of
100 mV, the required bootstrap capacitance is 360 nF. A
good quality ceramic capacitor should be used, and derating
for the significant capacitance drop of MLCs at high
temperature must be applied. In this example, selection of
470 nF or even 1 mF would be recommended.
due to its low forward drop, which maximizes the drive
available for the high-side MOSFET. The bootstrap diode
must also be able to handle at least 5.0 V more than the
maximum battery voltage. The average forward current can
be estimated by:
controller.
Power and Thermal Considerations
driver circuit is from the dissipation of MOSFET gate
charge. It can be estimated as:
VCC is the supply voltage 5.0 V.
f
Q
and low-side MOSFETs, respectively.
MOSFETs and two IRF7832 low-side MOSFETs. According
Table 2.
MAX
Keep the ceramic capacitor as close as possible to the ADP3419.
HSGATE
HSGATE
Murata
Taiyo-Yuden
Tokin
The bootstrap circuit uses a charge storage capacitor
where:
For example, two IRF7811 MOSFETs in parallel have a
A Schottky diode is recommended for the bootstrap diode
where f
The major power consumption of the ADP3419-based
where:
For example, the ADP3419 drives two IRF7821 high-side
BST
P
BST
Vendor
MAX
) and a Schottky diode (D1), as shown in Figure 16.
is the highest switching frequency.
[ VCC
is the voltage droop allowed on the high-side
MAX
and Q
is the total gate charge of the high-side MOSFET.
is the maximum switching frequency of the
LSGATE
GRM235Y5V106Z16
EMK325F106ZF
C23Y5V1C106ZP
(Q
I
Part Number
C
F(AVG)
HSGATE
BST
are the total gate charge of high-side
+
+ Q
Q
) Q
DV
HSGATE
HSGATE
BST
LSGATE
www.murata.com
www.t-yuden.com
www.tokin.com
)
Web Address
f
MAX
f
MAX
(eq. 1)
(eq. 2)
(eq. 3)