UBA2071T/N1,118 NXP Semiconductors, UBA2071T/N1,118 Datasheet - Page 9

• Manufacturer Part Number: UBA2071T/N1,118
• Description: IC DRIVER HALF BRIDGE 24SOIC
• Manufacturer: NXP Semiconductors
• Type: CCFL/EEFL Controllerr

Specifications of UBA2071T/N1,118

• Package / Case: 24-SOIC (0.300", 7.50mm Width)
• Frequency: 38 ~ 42kHz
• Current - Supply: 1.5mA
• Voltage - Supply: 14V
• Operating Temperature: -25°C ~ 100°C
• Driver Type: CCFL Drivers
• Operating Supply Voltage: 14 V
• Maximum Operating Temperature: + 100 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 25 C
• Supply Current: 1.5 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 935285139118

NXP Semiconductors
UBA2071_A_1
Product data sheet
8.5 Non-overlap
8.6 Low-side and high-side drivers
8.7 DC blocking capacitor charging
During each transition between the two states GL high/GH low and GL low/GH high, GL
and GH will both be low for a fixed time t
to be charged or discharged by the load current (presuming the load always has an
inductive behavior), and thus enabling zero voltage switching, see
The low-side and high-side drivers are identical. The output of each driver is connected to
the equivalent gate of an external power MOSFET. The high-side driver is supplied by the
bootstrap capacitor, which is charged from the V
low-side power MOSFETs is on. The low-side driver is directly supplied by the V
voltage.
When the IC is off, either because V
stopped after the time-out period during a fault condition, the low-side power switch
(Q
capacitor of the floating supply (C
effect the DC blocking capacitor (C
start-up. To prevent large inrush currents during the first switching cycles the UBA2071
and UBA2071A can first charge the DC blocking capacitor at start-up.
Fig 5.
LS
in
Figure
Oscillator, driver and half bridge voltages
V
GH
V
V
V
3) is turned on by making GL high. This ensures that the supply buffer
CF
GL
HB
V
V
SH
V
V
V
CFH
DD
DD
HV
0
0
0
0
Rev. 01 — 23 June 2008
FS
block
VDD
in
Figure
in
no
is too low, it is disabled via the EN pin, or it
Figure
(non-overlap time) to allow the half bridge point
Half bridge control IC for CCFL backlighting
UBA2071; UBA2071A
t
3) is fully charged at start-up. As a side
no
DD
3) will be completely discharged at
voltage via an internal diode when the
Figure
014aaa102
© NXP B.V. 2008. All rights reserved.
5.
t
t
t
t
DD
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