LTC4244CGN-1#PBF Linear Technology, LTC4244CGN-1#PBF Datasheet - Page 13

• Manufacturer Part Number: LTC4244CGN-1#PBF
• Description: IC CTRLR HOTSWAP PCI 20-SSOP
• Manufacturer: Linear Technology
• Type: Hot-Swap Controllerr

Specifications of LTC4244CGN-1#PBF

• Applications: CompactPCI™
• Internal Switch(s): No
• Voltage - Supply: 3.3V, 5V, ±12V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 20-SSOP (0.154", 3.91mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

APPLICATIO S I FOR ATIO
Sense resistors R1 and R2 provide current fault detection
and R5 and C1 provide current control loop compensation
as well as ramp rate control for the GATE pin voltage.
Resistors R3 and R4 prevent high frequency oscillations
in MOSFET’s Q1 and Q2.
A power-up sequence begins when the OFF/ON pin is
pulled low (Figure 2). This enables the pass transistors to
turn on and an internal 21 A current source is connected
to TIMER. Once the pass transistors begin to conduct
current, the supplies will start to power up. Current limit
faults are ignored while the TIMER pin voltage is ramping
up and is less than (12V
voltages are within tolerance, HEALTHY# will pull low and
LOCAL_PCI_RST# is free to follow PCI_RST#.
LCL_PCI_RST#
HEALTHY#
BD_SEL#
10V/DIV
10V/DIV
10V/DIV
10V/DIV
3.3V
10V/DIV
10V/DIV
10V/DIV
10V/DIV
10V/DIV
12V
V
TIMER
5V
EEOUT
GATE
OUT
OUT
OUT
Figure 2. Normal Power-Up Sequence
U
IN
U
– 1.6V). When all four supply
10ms/DIV
W
U
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Power-Down Sequence
When the BD_SEL# signal is pulled high, a power-down
sequence begins (Figure 3).
Internal switches are connected to each of the output
voltage supply pins to discharge the bypass capacitors to
ground. The TIMER pin is immediately pulled low. The
GATE pin is pulled down by a 60 A current source to
prevent the load currents on the 3.3V and 5V supplies from
going to zero instantaneously and glitching the power
supply voltages. When any of the output voltages dips
below its threshold, the HEALTHY# signal pulls high and
LOCAL_PCI_RST# will be asserted low.
LCL_PCI_RST#
HEALTHY#
BD_SEL#
3.3V
10V/DIV
10V/DIV
10V/DIV
10V/DIV
10V/DIV
10V/DIV
10V/DIV
10V/DIV
10V/DIV
12V
V
TIMER
5V
EEOUT
GATE
OUT
OUT
OUT
Figure 3. Normal Power-Down Sequence
LTC4244/LTC4244-1
20ms/DIV
13
4244 F03
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