LTC4253CGN Linear Technology, LTC4253CGN Datasheet - Page 17

• Manufacturer Part Number: LTC4253CGN
• Description: IC HOT SWAP CONTRLR -48V 16-SSOP
• Manufacturer: Linear Technology
• Type: Hot-Swap Controllerr

Specifications of LTC4253CGN

• Applications: General Purpose
• Internal Switch(s): No
• Voltage - Supply: 11.2 V ~ 14.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SSOP (0.150", 3.90mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

applicaTions inForMaTion
TIMER
The operation of the TIMER pin is somewhat complex as
it handles several key functions. A capacitor C
at TIMER to provide timing for the LTC4253/LTC4253A.
Four different charging and discharging modes are avail-
able at TIMER:
1. 5µA slow charge; initial timing delay.
2. (200µA + 8 • I
3. 5µA slow discharge; circuit breaker “cool-off.”
4. Low impedance switch; resets the TIMER capacitor after
For initial timing delay, the 5µA pull-up is used. The
low impedance switch is turned off and the 5µA current
source is enabled when the interlock conditions are met.
C
When C
turns on and discharges C
and both SS and GATE outputs are released.
CIRCUIT BREAKER TIMER OPERATION
If the SENSE pin detects more than 50mV drop across R
the TIMER pin charges C
charges to 4V, the GATE pin pulls low and the LTC4253/
LTC4253A latch off. The LTC4253/LTC4253A remain
latched off until the RESET pin is momentarily pulsed
high, the UV pin is momentarily pulsed low, the TIMER
pin is momentarily discharged low by an external switch
or V
breaker timeout period is given by:
T
an initial timing delay, in UVLO, in UV and in OV during
initial timing and when RESET is high.
charges to 4V in a time period given by:
t =
t =
IN
4V • C
200µA + 8 •I
dips below UVLO and is then restored. The circuit
T
5µA
reaches V
4V • C
T
DRN
T
TMRH
DRN
) fast charge; circuit breaker delay.
( 4V), the low impedance switch
T
T
. A GATE start-up cycle begins
with (200µA + 8 • I
DRN
T
is used
). If C
(2)
(3)
S
T
,
If V
current and this makes I
above V
charging of C
Intermittent overloads may exceed the 50mV threshold at
SENSE but, if their duration is sufficiently short, TIMER will
not reach 4V and the LTC4253/LTC4253A will not shut the
external MOSFET off. To handle this situation, the TIMER
discharges C
SENSE voltage is less than 50mV. Therefore, any intermit-
tent overload with V
of more than 2.5% will eventually trip the circuit breaker
and shut down the LTC4253/LTC4253A. Figure 4 shows
the circuit breaker response time in seconds normalized
to 1µF . The asymmetric charging and discharging of C
a fair gauge of MOSFET heating.
The normalized circuit response time is estimated by:
C
OUT
T
(µF)
t
< 5V, an internal PMOS isolates DRAIN pin leakage
DRNCL
0.01
Figure 4. Circuit Breaker Response Time
=
0.1
10
1
T
 
T
0
(
slowly with a 5µA pull-down whenever the
during the circuit breaker fault period, the
is accelerated by 8 • I
205 + 8 •I
LTC4253/LTC4253A
20
OUT
FAULT DUTY CYCLE, D (%)
C
T
(µF)
t
DRN
< 5V and an aggregate duty cycle
4
DRN
40
=
(205 + 8 • I
= 0 in Equation (3). If V
)
• D − 5
60
4
DRN
I
DRN
DRN
) • D – 5
 
80
for D > 2.5%
= 0µA
4253 F04
of Equation (1).
100
17
425353afd
OUT
T
(4)
is
is