LTC4253CGN Linear Technology, LTC4253CGN Datasheet
LTC4253CGN
Specifications of LTC4253CGN
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LTC4253CGN Summary of contents
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... Disk Arrays n L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical applicaTion – 48V/2.5A Hot Swap Controller – 48V RTN 2 ...
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... LTC4253AI (OBSOLETE) ......................–40°C to 85°C Storage Temperature Range .................. –65°C to 150°C Lead Temperature (Soldering, 10 sec) ................... 300°C orDer inForMaTion LEAD FREE FINISH TAPE AND REEL LTC4253CGN#PBF LTC4253CGN#TRPBF LTC4253IGN#PBF LTC4253IGN#TRPBF LTC4253ACGN#PBF LTC4253ACGN#TRPBF LTC4253AIGN#PBF LTC4253AIGN#TRPBF Consult LTC Marketing for parts specified with wider operating temperature ranges. ...
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T SYMBOL PARAMETER V V – V Zener Voltage – V Zener Dynamic Impedance Supply Current Undervoltage Lockout ...
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LTC4253/LTC4253A elecTrical characTerisTics temperature range, otherwise specifications are at T SYMBOL PARAMETER V OV Pin Threshold Pin Hysteresis OVHST I SENSE Pin Input Current SENSE I UV, OV Pin Input Current INP V TIMER Pin Voltage High ...
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Typical perForMance characTerisTics V vs Temperature Z 14 2mA IN 14.0 13.5 13.0 12.5 12.0 –55 –35 – 105 125 TEMPERATURE (°C) 4253 G01 180 I = 2mA ...
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LTC4253/LTC4253A Typical perForMance characTerisTics I (FCL, Sink) vs Temperature GATE 400 UV/ TIMER = 0V 350 V – 0.3V SENSE GATE 300 250 200 150 100 50 0 –55 –35 –15 5 ...
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Typical perForMance characTerisTics I (Initial Cycle, Sourcing) TMR vs Temperature 2mA TMR –55 –35 – 105 125 TEMPERATURE ...
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LTC4253/LTC4253A Typical perForMance characTerisTics I vs Temperature PGH 2mA PWRGD –55 –35 – 105 125 TEMPERATURE (°C) 4253 ...
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FuncTions the start-up cycle, the SS capacitor (C 22µA (28µA for the LTC4253A) current source. The GATE pin is held low until SS exceeds 20 • V internally shunted by a 100k R which limits the SS pin SS ...
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LTC4253/LTC4253A pin FuncTions TIMER (Pin 13): Timer Input. Timer is used to generate an initial timing delay at start-up, and to delay shutdown in the event of an output overload (circuit breaker fault). Timer starts an initial timing cycle when ...
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DiagraM 50µA PWRGD1 EN2 120µA 50µ PWRGD2 2 SQTIMER V EE EN3 120µA 50µ PWRGD3 16 SQTIMER V EE 6.15V (5.09V) ...
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LTC4253/LTC4253A operaTion Hot Circuit Insertion When circuit boards are inserted into a live backplane, the supply bypass capacitors can draw huge transient currents from the power bus as they charge. The flow of current damages the connector pins and glitches ...
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Interlock Conditions A start-up sequence commences once these “interlock” conditions are met: 1. The input voltage V exceeds The voltage at UV > for the LTC4253A). UVHI UV 3. The voltage at OV < ...
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LTC4253/LTC4253A operaTion Higher overloads are handled by an analog current limit loop. If the drop across R reaches V S limiting loop servos the MOSFET gate and maintains a constant output current current limit mode, ...
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To protect V against damage from higher am- IN plitude spikes, clamp with a 13V Zener diode Star connect V and all V -referred components to the EE EE sense resistor Kelvin ...
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LTC4253/LTC4253A applicaTions inForMaTion The separate UV and OV pins can be used for wider op- erating range such as 35.6V to 76.3V range as shown in Figure 2. Other combinations are possible with different resistors arrangement. UV/OV COMPARATORS (LTC4253A) A ...
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TIMER The operation of the TIMER pin is somewhat complex as it handles several key functions. A capacitor C at TIMER to provide timing for the LTC4253/LTC4253A. Four different charging and discharging modes are avail- able at TIMER: ...
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LTC4253/LTC4253A applicaTions inForMaTion POWER GOOD SEQUENCING After the initial TIMER cycle, GATE ramps up to turn on the external MOSFET which in turn pulls DRAIN low. When GATE is within 2. and DRAIN is lower than IN V ...
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Sense The SENSE pin is monitored by the circuit breaker (CB) comparator, the analog current limit (ACL) amplifier, and the fast current limit (FCL) comparator. Each of these three measures the potential of SENSE relative to V SENSE ...
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LTC4253/LTC4253A applicaTions inForMaTion MOSFET SELECTION The external MOSFET switch must have adequate safe op- erating area (SOA) to handle short-circuit conditions until TIMER times out. These considerations take precedence over DC current ratings. A MOSFET with adequate SOA for a ...
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Computing the maximum soft-start capacitor value during soft-start to a load short is complicated by the nonlinear MOSFET’s SOA characteristics and the R An overconservative but simple approach begins with the maximum circuit breaker current, given by: V ...
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LTC4253/LTC4253A applicaTions inForMaTion SENSE RESISTOR CONSIDERATIONS For proper circuit breaker operation, Kelvin-sense PCB connections between the sense resistor and the LTC4253/ LTC4253A’s V and SENSE pins are strongly recom- EE mended. The drawing in Figure 7 illustrates the correct way ...
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V CLEARS V IN RESET < 0.8V, GATE < GND – (–48RTN) – (–48V) UV/ LKO TIMER GATE V GATEL SS SENSE V OUT DRAIN PWRGD1 PWRGD2 PWRGD3 SQTIMER ...
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LTC4253/LTC4253A applicaTions inForMaTion Live Insertion with Short Pin Control of UV/OV In the example shown in Figure 9, power is delivered through long connector pins whereas the UV/OV divider makes contact through a short pin. This ensures the power UV ...
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V (V for the LTC4253A). In addition, the internal logic UVHI UV checks for OV < for the LTC4253A), RESET < OVHI OV 0.8V, GATE < SENSE < V GATEL CB TIMER < V . When ...
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LTC4253/LTC4253A applicaTions inForMaTion UV DROPS BELOW V (V – V UVLO UV UVHST UV CLEARS V (V UVHI UVHI V UVLO 5µA TIMER GATE V GATEL SS SENSE DRAIN PWRGD1 PWRGD2 PWRGD3 SQTIMER EN2 EN3 ...
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OV OVERSHOOTS V OVHI OV DROPS BELOW OVHI V OVLO V TMRH 200µ • I TIMER GATE 50µA V GATEL 20 • ACL OS 20 • ...
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LTC4253/LTC4253A applicaTions inForMaTion Resetting a Fault Latch A latched circuit breaker fault of the LTC4253/LTC4253A has the benefit of a long cooling time. The latched fault can be reset by pulsing the RESET pin high until the TIMER pin is ...
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LTC4253/LTC4253A 425353afd 29 ...
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LTC4253/LTC4253A applicaTions inForMaTion TMRH 200µ • I DRN TIMER GATE SS V ACL SENSE OUT DRAIN PWRGD1 (14a) Analog Current Limit Fault Figure 14. Current Limit Behavior (All Waveforms Are Referenced ...
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Power Limit Circuit Breaker Figure 16 shows the LTC4253A in a power limit circuit breaking application. The SENSE pin is modulated by board voltage V . The D1 Zener voltage, V SUPPLY same as the lowest operating voltage, ...
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LTC4253/LTC4253A applicaTions inForMaTion The peak power at the fault current limit occurs at the supply overvoltage threshold. The fault current limited power is: POWER(FAULT SUPPLY • V − (V − V ACL SUPPLY R ...
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... Revised Application drawings Replaced Shunt Regulator section Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. LTC4253/LTC4253A ...
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... C2 100µF POWER MODULE POWER 0.1µF 100k MODULE † V OUT Q1 IRF530S 0.02 *DIODES, INC. † FMMT493 †† RECOMMENDED FOR HARSH ENVIRONMENTS. LT 0211 REV D • PRINTED IN USA LINEAR TECHNOLOGY CORPORA TION 2002 POWER MODULE 3 EN 4253 F17 425353afd ...