ADE7763ARS Analog Devices Inc, ADE7763ARS Datasheet - Page 24

• Manufacturer Part Number: ADE7763ARS
• Description: IC ENERGY METER 1PHASE 20SSOP
• Manufacturer: Analog Devices Inc

Specifications of ADE7763ARS

• Input Impedance: 390 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.8V
• Current - Supply: 3mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SSOP (0.200", 5.30mm Width)
• Meter Type: Single Phase
• For Use With: EVAL-ADE7763ZEB - BOARD EVALUATION FOR ADE7763
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

ADE7763
PHASE COMPENSATION
When the HPF is disabled, the phase error between Channel 1
and Channel 2 is 0 from dc to 3.5 kHz. When HPF is enabled,
Channel 1 has the phase response illustrated in Figure 50 and
Figure 51. Figure 52 shows the magnitude response of the filter.
As seen from the plots, the phase response is almost 0 from
45 Hz to 1 kHz, which is all that is required in typical energy
measurement applications. However, despite being internally
phase-compensated, the ADE7763 must work with transducers,
which could have inherent phase errors. For example, a phase
error of 0.1° to 0.3° is not uncommon for a current transformer
(CT). Phase errors can vary from part to part and must be
corrected in order to perform accurate power calculations. The
errors associated with phase mismatch are particularly
noticeable at low power factors. The ADE7763 provides a means
of digitally calibrating these small phase errors by allowing a
short time delay or time advance to be introduced into the
signal processing chain to compensate for these errors. Because
the compensation is in time, this technique should only be used
for small phase errors in the range of 0.1° to 0.5°. Correcting
large phase errors using a time shift technique can introduce
significant phase errors at higher harmonics.
The phase calibration register (PHCAL[5:0]) is a twos comple-
ment, signed, single-byte register that has values ranging from
0x21 (–31d) to 0x1F (+31d).
The register is centered at 0Dh, so that writing 0Dh to the register
produces 0 delay. By changing the PHCAL register, the time
delay in the Channel 2 signal path can change from –102.12 μs
to +39.96 μs (CLKIN = 3.579545 MHz). One LSB is equivalent
to 2.22 μs (CLKIN/8) time delay or advance. A line frequency of
60 Hz gives a phase resolution of 0.048° at the fundamental (i.e.,
360° × 2.22 μs × 60 Hz). Figure 49 illustrates how the phase
compensation is used to remove a 0.1° phase lead in Channel 1
due to the external transducer. To cancel the lead (0.1°) in
Channel 1, a phase lead must also be introduced into Channel 2.
The resolution of the phase adjustment allows the introduction
of a phase lead in increments of 0.048°. The phase lead is
achieved by introducing a time advance in Channel 2. A time
advance of 4.44 μs is made by writing −2 (0x0B) to the time delay
block, thus reducing the amount of time delay by 4.44 μs, or
equivalently, a phase lead of approximately 0.1° at line frequency
of 60 Hz. 0x0B represents –2 because the register is centered
with 0 at 0Dh.
Rev. B | Page 24 of 56
V1
V2
V1P
V1N
V2P
V2N
–0.1
0.20
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
V1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
40
PGA1
PGA2
V2
Figure 50. Combined Phase Response of HPF and
Figure 51. Combined Phase Response of HPF and
60Hz
45
Phase Compensation (10 Hz to 1 kHz)
Phase Compensation (40 Hz to 70 Hz)
ADC 2
ADC 1
0.1°
10
Figure 49. Phase Calibration
2
50
FREQUENCY (Hz)
FREQUENCY (Hz)
1
–102.12μs TO +39.96μs
5
DELAY BLOCK
0
55
PHCAL[5:0]
2.22μs/LSB
0
1
HPF
0
1
10
60
1
3
0
24
65
CHANNEL 2 DELAY
REDUCED BY 4.44μs
(0.1°LEAD AT 60Hz)
0x0B IN PHCAL [5.0]
V2
24
V1
60Hz
10
70
LPF2
4