ISL6295CVZ Intersil, ISL6295CVZ Datasheet - Page 12

• Manufacturer Part Number: ISL6295CVZ
• Description: IC FUEL GAUGE LOW VOLTAGE8-TSSOP
• Manufacturer: Intersil

Specifications of ISL6295CVZ

• Function: Fuel, Gas Gauge/Monitor
• Battery Type: Lithium-Ion (Li-Ion), Lithium-Polymer (Li-Pol)
• Voltage - Supply: 2.8 V ~ 7 V
• Operating Temperature: -20°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-TSSOP
• Battery Management Function: Fuel Gauge
• Supply Voltage Range: 2.8V To 7V
• Interface Type: 2-Wire, Serial, I2C
• Battery Ic Case Style: TSSOP
• No. Of Pins: 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figures 3 through 6 detail how data transfer is accomplished
on the SMBus. Depending upon the state of the R/W bit, two
types of data transfer are possible:
The master device generates all of the serial clock pulses
and the START and STOP conditions. A transfer is ended
1. Data transfer from a master transmitter to a slave
2. Data transfer from a slave transmitter to a master
receiver: The first byte transmitted by the master is the
slave address. Next follows a number of data bytes. The
slave returns an Acknowledge bit after each received
byte.
receiver: The first byte (slave address) is transmitted by
the master. The slave then returns an Acknowledge bit.
Next follows a number of data bytes transmitted by the
slave to the master. The master returns an Acknowledge
bit after all received bytes other than the last byte. At the
end of the last received byte, a 'Not Acknowledge' is
returned.
Ā
PEC
Legend:
S
P
RS
A
A
BT
Bank
AH
Add
S
l
7
7
7
(
Additional data bytes if BT =1
S
MBus Address
12
-Start
- Stop
- Repeated start
- Acknowdedge
-
-
-
-
PEC (optional)
-
Address Low
Negative Acknowledge (terminates transaction)
Block mode indicator bit
Controls selection of bank:
High order address bits (2)
Packet Error Code
00: EEPROM
01: RAM / Registers
FIGURE 7. ISL6295 SMBus WRITE TRANSACTION
1
0
0
0
0
A /
A
A
)
A
10: Reserved
11: Reserved
ISL6295
BT
7
7
7
# of Bytes (only if BT = 1
P
with a STOP condition or with a Repeated START condition.
Since a Repeated START condition is also the beginning of
the next serial transfer, the bus will not be released.
The ISL6295 may operate in the following two modes:
6
1. Slave receiver mode: Serial data and clock are received
2. Slave transmitter mode: The first byte is received and
Last write data byte
through SDA and SCL. After each byte is received, an
acknowledge bit is transmitted. START and STOP
conditions are recognized as the beginning and end of a
serial transfer. Address recognition is performed by
hardware after reception of the slave address and
direction bit.
handled as in the Slave Receiver mode. However, in this
mode, the direction bit will indicate that the transfer
direction is reversed. Serial data is transmitted on SDA by
the ISL6295 while the serial clock is input on SCL. START
and STOP conditions are recognized as the beginning
and end of a serial transfer.
X
4
3
Bank
2
Master controls SDA
ISL6295 controls SDA
1
AH
)
0
0
0
A
A
A
February 8, 2011
FN9074.2