isl6295 Intersil Corporation, isl6295 Datasheet
isl6295
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isl6295 Summary of contents
Page 1
... Also included are an on-chip voltage regulation circuit, non-crystal time base, and on-chip temperature sensor. The operating voltage range of the ISL6295 is optimized to allow a direct interface to a single cell Li-Ion/Li-Poly pack. 256 bytes of general-purpose nonvolatile EEPROM storage are provided to store factory programmed, measured, and user defined parameters ...
Page 2
... Accumulator Time Base Accuracy (internal 2Hz clock) Internal A/D operating clock Power-on-Reset Threshold Delay to entry of Shelf-Sleep mode 2 ISL6295 Thermal Information Thermal Resistance (Typical, Note 1) TSSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum Junction Temperature (Plastic Package 120°C Maximum Storage Temperature Range . . . . . . . . . . . -35°C to 120°C Maximum Lead Temperature (Soldering 10s 300° and ambient temperature is at 25° ...
Page 3
... ADC results. 5. Voltage is internal at A/D converter inputs. VSR is measured directly. VP and GPAD inputs are measured using internal level-translation circuitry that scales the input voltage range appropriately for the converter. 3 ISL6295 = 5V and ambient temperature is at 25°C, All Maximum and Minimum Values P SYMBOL TEST CONDITIONS = -20° ...
Page 4
... General purpose A/D input or general purpose input/output pin. Grounded if not used. VP (Pin 2) Cell input connection for the positive terminal of the Li-Ion cell. Connects to the positive terminal of 1-cell series packs. VP serves as the power supply input for the ISL6295. SCL (Pin 3) 2 SMBus/I C™ clock line connection ...
Page 5
... SMBus/I This communications port for the ISL6295 is a 2-wire industry-standard SMBus/I status, and data is read or written from the host system via this interface. A/D and Accumulator/Timer Operation ...
Page 6
... AUXctrl AUXres Any 6 ISL6295 The 3-bit “resolution” field in each A/D control register determines the magnitude resolution of the conversion, from a minimum of 8-bits to a maximum of 15-bits. The time required to complete the conversion is a function of the number of bits of resolution selected. The conversion time ...
Page 7
... NTC device used suggested that temperature measurements be thoroughly characterized to extract the best-fit equation for temperature determination. Internal to the ISL6295, a voltage inverter is provided to translate the NTC voltage to a PTC voltage so that a larger A/D conversion result would correspond to a higher temperature reading. The actual voltage presented to the ...
Page 8
... Run Mode can also be entered from the POR Sample, Sample-Sleep, and Shelf-Sleep modes described. The ISL6295 will remain in RUN mode as long as the pack voltage is above the V Sleep, and Shelf-Sleep modes are not active. SAMPLE MODE In Sample Mode, A/D measurements are not continuously performed as in Run Mode ...
Page 9
... When the output function is disabled, an external circuit may drive the pin as an input with a voltage range of 0-3.3V. The input function may be used whether or not the pin is driven by the ISL6295. In addition, the input function may be disabled, in which case, the input buffer is SampDiv ...
Page 10
... SMBus slave address for access to all functions. The following brief overview of the SMBus/I C™ operational implementation in the ISL6295. Please refer to the SMBus V1.1 specification for complete operational details of this industry standard interface. This specification can be obtained at the SMBus Implementer's Forum web site at www.smbus.org. ...
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... START SCL SU:STA HD:STA V IH SDA ISL6295 Data Stable Data Change FIGURE 3. VALID DATA CHANGES ON THE SDA BUS Start FIGURE 4. VALID START AND STOP CONDITIONS HIGH LOW t t HD:DAT SU:DAT FIGURE 6. BUS TIMING Data Stable Stop ...
Page 12
... Slave Receiver mode. However, in this mode, the direction bit will indicate that the transfer direction is reversed. Serial data is transmitted on SDA by the ISL6295 while the serial clock is input on SCL. START and STOP conditions are recognized as the beginning and end of a serial transfer. ...
Page 13
... Memory/Register Map The ISL6295 internal structure is accessible on a strict memory mapped basis. The only action directly taken by the ISL6295 in response to an SMBus command is to read or write registers, SRAM, or EEPROM locations. Any actions taken by ISL6295 happen as a result of values written to internal control registers. ...
Page 14
... The TA register may be cleared by setting the "CLR4" bit in the ACCclr register. TAT - TEMPERATURE TIME COUNT REGISTER The TAT register records the length of time that the ISL6295 is sensing temperature and accumulating the value in register TA. TAT is incremented at a rate of 2Hz for as long as temperature accumulation is enabled ...
Page 15
... GPIOctrl Reserved 0x00h ACCctrl 15 ISL6295 TABLE 1. ISL6295 MEMORY MAP BYTE 2 BYTE 1 ↓↓↓ Battery Pack Information (unassigned) ↓↓↓ ↑↑↑ Battery Pack Information (unassigned) ↑↑↑ ↓↓↓ Operational Registers Initialization Values ↓↓↓ ...
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... FUNCTION BYTE 3 Operational Registers: Accumulators, Reserved Timers, A/D Registers 0x00h and Mode Control (Continued) Reserved MOSCT Cal/Setup Registers Reserved 16 ISL6295 TABLE 1. ISL6295 MEMORY MAP (Continued) BYTE 2 BYTE 1 Reserved 0x00h TRIPctrl OPmode Reserved // // VREFT VBGT AOSCT TestMuxSel BANK:ADDRESS BYTE 0 (BYTE 0) I-trip 1:0x064 VPtrip ...
Page 17
... All A/D conversions are disabled when it is cleared to ‘0’. Samp Sample Mode enable: This bit controls the enabling of Sample mode when the ISL6295 is not in a Power-on Reset, Sample-Sleep, or Shelf-Sleep mode. When set to ‘1’, Sample Mode is enabled and conversions will be performed at a periodic rate determined by the programming of the “ ...
Page 18
... Reference A/D Reference selection: Selects the reference voltage used for the pending A/D conversion 170mV reference (for differential conversion 340mV reference (for single-ended conversion) 18 ISL6295 Select Addr 42h 46h 4Ah 4Eh 52h 56h 5Ah In order for the A/D control registers to function according to ...
Page 19
... When set to “1”, the pull-down device is disabled and the IO1 is three-stated. OUT0 IO0 Output Data: Sets the logic level driven on the IO0 pin. Relevant only when Output Enable bit “OE0” is set. 19 ISL6295 IN1 IN0 ACCUMULATOR CLEAR REGISTER - ACCclr (Address - 62 Hex/98 Decimal) 7 CLR7 A ‘ ...
Page 20
... Soft Reset: Writing a ‘1’ to this bit will cause the device to re-initialize by reloading EEPROM contents into all working registers. This function has the same effect as the initial Power-on Reset. 20 ISL6295 TRIP CONTROL REGISTER - TRIPctrl (Address 76 Hex/118 Decimal POR ...
Page 21
... CAUTION: Some critical calibration and initialization data is programmed into the EEPROM locations with default values at the time of the ISL6295 manufacture. Any modification to these values may cause incorrect operation or malfunction of the part. The following table sumarises the critical control registers where the default settings must be kept ...
Page 22
... Reserved: 0x00 MOSCT: 0xxxxxxxb (‘xxxxxxx’ = factory trim value) Cal/Setup Registers Reserved: 0x00 22 ISL6295 TABLE 3. ISL6295 REGISTER INITIALIZATION BYTE 2 BYTE 1 DCA: 0x00000000 DTC: 0x00000000 CCA: 0x00000000 CTC: 0X00000000 TA: 0X00000000 GPADA: 0X00000000 GPADT: 0X00000000 CTC: 0x00000000 Ictrl (ADc0): 01110000b = 0x70 ...
Page 23
... Addr2 hex 52 Addr3 hex 74 After each address is sent, the ISL6295 will NACK the address. Once the sequence is complete, the ISL6295 will enter Cal/Setup mode and allow access to the test mode registers located in memory bank 2. To exit Cal/Setup mode, re-enter the same address sequence or power down the device ...
Page 24
... Fuel Gauge Operation The operation overview diagram in Figure 9 illustrates the fuel gauge operation of the ISL6295. The ISL6295 incorporates four 32-bit accumulators and four 32-bit elapsed time counters. The Charge Current Accumulator (CCA) and Discharge Current Accumulator (DCA) Input Charge Current CCA ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 25 ISL6295 M8.173 8 LEAD THIN SHRINK NARROW BODY SMALL OUTLINE M ...