NCP1219AD100R2G ON Semiconductor, NCP1219AD100R2G Datasheet - Page 13

no-image

NCP1219AD100R2G

Manufacturer Part Number
NCP1219AD100R2G
Description
IC PWM CONTROLLER 100KHZ 7-SOIC
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCP1219AD100R2G

Output Isolation
Isolated
Frequency Range
95 ~ 105kHz
Voltage - Input
9 ~ 20 V
Power (watts)
920mW
Operating Temperature
-40°C ~ 150°C
Package / Case
8-SOIC (0.154", 3.90mm Width) 7 leads
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NCP1219AD100R2G
Manufacturer:
ON Semiconductor
Quantity:
800
Part Number:
NCP1219AD100R2G
Manufacturer:
ON/安森美
Quantity:
20 000
to prevent the controller from dissipating excessive power
if the V
current source (I
typically 0.67 V. Once V
current source is enabled. This behavior is illustrated in
Figure 27. This slightly increases the total time to charge
V
500 V. If the device operates in the DSS mode, power
dissipation should be controlled to avoid exceeding the
maximum power dissipation of the controller. If dissipation
on the controller is excessive, a resistor can be placed in
series with the HV pin. This will reduce power dissipation
on the controller and transfer it to the series resistor.
can be reduced by biasing the controller with an auxiliary
winding. The auxiliary winding needs to maintain V
above V
DSS mode, P
I
switching and V
is most often connected to the bulk capacitor.
CC3
CC
An internal supervisory circuit monitors the V
The start−up circuit is rated at a maximum voltage of
Standby mode losses and normal mode power dissipation
The power dissipation of the controller when operated in
Startup Current
I
inhibit
Figure 27. Startup Current at Various V
I
start
, but it is generally not noticeable.
is the operating current of the NCP1219 during
V
V
CC(hiccup)
CC
CC(MIN)
Figure 26. V
V
CC(reset)
V
CC(MIN)
Fault2
UVLO
CC(on)
DRV
pin is accidentally grounded. A lower level
DSS
V
inhibit
P
HV
, can be calculated using equation 1, where
DSS
inhibit
once the startup circuit is disabled.
is the voltage at the HV pin. The HV pin
+ I
CC
) charges C
Double Hiccup Operation with a Fault Occurring While the Startup Circuit is Enabled
CC3
CC
V
CC(MIN)
@ (V
ON
exceeds V
HV
CC
* V
from 0 V to V
CC
inhibit
V
)
Fault
CC(on)
CC
, the startup
Levels
CC
voltage
http://onsemi.com
(eq. 1)
inhibit
V
CC
CC
,
13
circuit is disabled and V
auxiliary winding is a function of the V
shown in Equation 2.
placed as close as possible to the V
noise immunity.
Soft−Start Operation
included
comparator. When the NCP1219 starts up, a soft−start
voltage V
gradually from 0 V to 1.0 V in 4.8 ms and stays at 1.0 V
afterward. V
feedback pin voltage (V
(V
PWM duty ratio generation. Initially, (V
1.0 V because the FB pin is brought to V
3.6 V, by the internal pullup resistor. As a result, V
limited by the soft−start function and slowly ramps up the
duty ratio (and therefore the primary current) for the initial
4.8 ms. This provides a greatly reduced stress on the power
devices during startup.
OFF
Figure 28. V
In comparison, the power dissipation when the startup
It is recommended that an external filter capacitor be
Figures 28 and 29 show how the soft−start feature is
FB
/3) becomes the modulation voltage, V
SSTART
in
V
SSTART
SSTART
V
PWM
FB
the
/3
is the lesser of V
P
begins at 0 V. V
0
AUX
is compared with the divided by 3
pulse−width
FB
+ I
/3). The lesser of V
CC
1
CC3
)
is being supplied by the
@ V
CC
CC
modulation
SSTART
pin to improve the
CC
V
SSTART
FB(open)
PWM
voltage. This is
FB
ON
and (V
/3) is above
PWM
SSTART
, typically
increases
, in the
(PWM)
PWM
FB
(eq. 2)
/3)
and
is

Related parts for NCP1219AD100R2G