TOP234GN Power Integrations, TOP234GN Datasheet - Page 6

IC OFFLINE SWIT OVP UVLO 8SMD

TOP234GN

Manufacturer Part Number
TOP234GN
Description
IC OFFLINE SWIT OVP UVLO 8SMD
Manufacturer
Power Integrations
Series
TOPSwitch®-FXr
Type
Off Line Switcherr
Datasheet

Specifications of TOP234GN

Output Isolation
Isolated
Frequency Range
66 ~ 132kHz
Voltage - Output
700V
Power (watts)
30W
Operating Temperature
-40°C ~ 150°C
Package / Case
8-SMD Gull Wing, 7 Leads
Output Voltage
12 V
Input / Supply Voltage (max)
265 VAC
Input / Supply Voltage (min)
85 VAC
Duty Cycle (max)
78 %
Switching Frequency
132 KHz
Supply Current
1.5 mA
Operating Temperature Range
- 40 C to + 150 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TOP234GN
Manufacturer:
PowerInt
Quantity:
350
Part Number:
TOP234GN
Manufacturer:
POWER
Quantity:
4 500
the MOSFET gate driver. The filtered error signal is compared
with the internal oscillator sawtooth waveform to generate the
duty cycle waveform. As the control current increases, the duty
cycle decreases. A clock signal from the oscillator sets a latch
which turns on the output MOSFET. The pulse width modulator
resets the latch, turning off the output MOSFET. Note that a
minimum current must be driven into the CONTROL pin
before the duty cycle begins to change.
The maximum duty cycle, DC
value of 78% (typical). However, by connecting the MULTI-
FUNCTION pin to the rectified DC high voltage bus through a
resistor with appropriate value, the maximum duty cycle can be
made to decrease from 78% to 38% (typical) as shown in
Figure 8 when input line voltage increases (see line feed
forward with DC
Minimum Duty Cycle and Cycle Skipping
To maintain power supply output regulation, the pulse width
modulator reduces duty cycle as the load at the power supply
output decreases. This reduction in duty cycle is proportional
to the current flowing into the CONTROL pin. As the
CONTROL pin current increases, the duty cycle reduces linearly
towards a minimum value specified as minimum duty cycle,
DC
increased further by approximately 0.4 mA, the pulse width
modulator will force the duty cycle from DC
discrete step (refer to Figure 4). This feature allows a power
supply to operate in a cycle skipping mode when the load at its
output consumes less power than the power that TOPSwitch-FX
delivers at minimum duty cycle, DC
is needed for the transition between normal operation and cycle
skipping. As the load increases or decreases, the power supply
automatically switches between normal operation and cycle
skipping mode as necessary.
Cycle skipping may be avoided, if so desired, by connecting a
minimum load at the power supply output such that the duty
cycle remains at a level higher than DC
Error Amplifier
The shunt regulator can also perform the function of an error
amplifier in primary feedback applications. The shunt regulator
voltage is accurately derived from a temperature-compensated
bandgap reference. The gain of the error amplifier is set by the
CONTROL pin dynamic impedance. The CONTROL pin
clamps external circuit signals to the V
CONTROL pin current in excess of the supply current is
separated by the shunt regulator and flows through R
voltage error signal.
On-chip Current Limit with External Programmability
The cycle-by-cycle peak drain current limit circuit uses the
output MOSFET ON-resistance as a sense resistor. A current
6
TOP232-234
MIN
. After reaching DC
B
7/01
MAX
reduction).
MIN
MAX
, if CONTROL pin current is
, is set at a default maximum
MIN
. No additional control
MIN
C
at all times.
voltage level. The
MIN
to zero in a
E
as a
Figure 6. Switching Frequency Jitter.
limit comparator compares the output MOSFET on-state drain
to source voltage, V
current causes V
the output MOSFET off until the start of the next clock cycle.
The default current limit of TOPSwitch-FX is preset internally.
However, with a resistor connected between MULTI-
FUNCTION pin and SOURCE pin, current limit can be
programmed externally to a lower level between 40% and
100% of the default current limit. Please refer to the graphs in
the typical performance characteristics section for the selection
of the resistor value.
TOPSwitch-FX that is bigger than necessary for the power
required can be used to take advantage of the lower R
higher efficiency. With a second resistor connected between
the MULTI-FUNCTION pin and the rectified DC high voltage
bus providing a small amount of feed forward current, a true
power limiting operation against line variation can be
implemented. When using an RCD clamp, this feed forward
technique reduces maximum clamp voltage at high line allowing
for higher reflected voltage designs. The current limit
comparator threshold voltage is temperature compensated to
minimize the variation of the current limit due to temperature
related changes in R
The leading edge blanking circuit inhibits the current limit
comparator for a short time after the output MOSFET is turned
on. The leading edge blanking time has been set so that, if a
power supply is designed properly, current spikes caused by
primary-side capacitances and secondary-side rectifier reverse
recovery time will not cause premature termination of the
switching pulse.
The current limit can be lower for a short period after the
leading edge blanking time as shown in Figure 33. This is due
to dynamic characteristics of the MOSFET. To avoid triggering
the current limit in normal operation, the drain current waveform
should stay within the envelope shown.
Line Under-Voltage Detection (UV)
At power up, UV keeps TOPSwitch-FX off until the input line
Frequency
V
Switching
DRAIN
128 kHz
DS(ON)
136 kHz
DS(ON)
DS(ON)
to exceed the threshold voltage and turns
with a threshold voltage. High drain
By setting current limit low, a
of the output MOSFET.
4 ms
DS(ON)
Time
for

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