MCM69C432TQ20 Freescale Semiconductor, MCM69C432TQ20 Datasheet - Page 18

• Manufacturer Part Number: MCM69C432TQ20
• Description: IC CAM 1MB 50MHZ 100LQFP
• Manufacturer: Freescale Semiconductor

Specifications of MCM69C432TQ20

• Format - Memory: RAM
• Memory Type: CAM
• Memory Size: 1M (16K x 64)
• Speed: 50MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

MCM69C432 SCM69C432
18
TCK — TEST CLOCK (INPUT)
edge of TCK and all outputs propagate from the falling edge
of TCK.
TMS — TEST MODE SELECT (INPUT)
is the command input for the TAP controller state machine.
An undriven TMS input will produce the same result as a
logic 1 input level.
TDI — TEST DATA IN (INPUT)
the input side of the serial registers placed between TDI and
TDO. The register placed between TDI and TDO is deter-
mined by the state of the TAP controller state machine and
Clocks all TAP events. All inputs are captured on the rising
The TMS input is sampled on the rising edge of TCK. This
The TDI input is sampled on the rising edge of TCK. This is
1
0
NOTE: The value adjacent to each state transition represents the signal present at TMS at the rising edge of TCK.
TEST ACCESS PORT PINS
TEST–LOGIC
RUN–TEST/
RESET
IDLE
0
1
Freescale Semiconductor, Inc.
For More Information On This Product,
0
Figure 5. TAP Controller State Diagram
1
Go to: www.freescale.com
SELECT DR–SCAN
1
CAPTURE–DR
PAUSE 2–DR
PAUSE 1–DR
EXIT1–DR
SHIFT–DR
EXIT2–DR
0
0
1
0
1
1
0
the instruction that is currently loaded in the TAP instruction
register (see Figure 5). An undriven TDI pin will produce the
same result as a logic 1 input level.
TDO — TEST DATA OUT (OUTPUT)
state machine (see Figure 5). Output changes in response to
the falling edge of TCK. This is the output side of the serial
registers placed between TDI and TDO.
TRST — TAP RESET
1149.1. Asserting the asynchronous TRST places the TAP
controller in test–logic reset state. Test–logic reset state can
also be entered by holding TMS high for five rising edges of
TCK. This type of reset does not affect the operation of the
system logic.
0
0
Output that is active depending on the state of the TAP
This device has a TRST pin. TRST is optional in IEEE
1
1
0
1
SELECT IR–SCAN
1
CAPTURE–IR
MOTOROLA FAST SRAM
UPDATE–IR
SHIFT–IR
PAUSE–IR
0
EXIT1–IR
EXIT2–IR
0
1
0
1
1
0
0
0
1
1