NAND128W3A0AN6 STMicroelectronics, NAND128W3A0AN6 Datasheet - Page 23

• Manufacturer Part Number: NAND128W3A0AN6
• Description: IC FLASH 128MBIT 48TSOP
• Manufacturer: STMicroelectronics

Specifications of NAND128W3A0AN6

• Format - Memory: FLASH
• Memory Type: FLASH - Nand
• Memory Size: 128M (16M x 8)
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Speed: -

Page Program
The Page Program operation is the standard oper-
ation to program data to the memory array.
The main area of the memory array is pro-
grammed by page, however partial page program-
ming is allowed where any number of bytes (1 to
528) or words (1 to 264) can be programmed.
The maximum number of consecutive partial page
program operations allowed in the same page is
three. After exceeding this a Block Erase com-
mand must be issued before any further program
operations can take place in that page.
Before starting a Page Program operation a Point-
er operation can be performed to point to the area
to be programmed. Refer to the
tions
Each Page Program operation consists of five
steps (see
1. one bus cycle is required to setup the Page
2. four bus cycles are then required to input the
Figure 17. Page Program Operation
Note: Before starting a Page Program operation a Pointer operation can be performed. Refer to
Program command
program address (refer to
section and
RB
I/O
Figure
Page Program
Setup Code
Figure 12.
17.):
80h
for details.
Table
Address Inputs
Pointer Opera-
6.)
NAND128-A, NAND256-A, NAND512-A, NAND01G-A
Data Input
3. the data is then input (up to 528 Bytes/ 264
4. one bus cycle is required to issue the confirm
5. The P/E/R Controller then programs the data
Once the program operation has started the Sta-
tus Register can be read using the Read Status
Register command. During program operations
the Status Register will only flag errors for bits set
to '1' that have not been successfully programmed
to '0'.
During the program operation, only the Read Sta-
tus Register and Reset commands will be accept-
ed, all other commands will be ignored.
Once the program operation has completed the P/
E/R Controller bit SR6 is set to ‘1’ and the Ready/
Busy signal goes High.
The device remains in Read Status Register mode
until another valid command is written to the Com-
mand Interface.
Words) and loaded into the Page Buffer
command to start the P/E/R Controller.
into the array.
(Program Busy time)
Confirm
Code
10h
tBLBH2
Pointer Operations
Busy
Read Status Register
70h
section for details.
SR0
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