M95128-WMN6P STMicroelectronics, M95128-WMN6P Datasheet - Page 20

• Manufacturer Part Number: M95128-WMN6P
• Description: IC EEPROM 128KBIT 5MHZ 8SOIC
• Manufacturer: STMicroelectronics

Specifications of M95128-WMN6P

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 128K (16K x 8)
• Speed: 5MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Organization: 16 K x 8
• Interface Type: SPI
• Maximum Clock Frequency: 5 MHz
• Access Time: 60 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.5 V
• Maximum Operating Current: 5 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 6.5 V
• Memory Configuration: 16384 X 8
• Clock Frequency: 10MHz
• Supply Voltage Range: 2.5V To 5.5V
• Memory Case Style: SOIC
• No. Of Pins: 8
• Operating Temperature Range: -40°C To
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8607-5; M95128-WMN6P

Instructions
5.5
20/44
Read from Memory Array (READ)
As shown in
The bits of the instruction byte and address bytes are then shifted in, on Serial Data Input
(D). The address is loaded into an internal address register, and the byte of data at that
address is shifted out, on Serial Data Output (Q).
If Chip Select (S) continues to be driven low, the internal address register is automatically
incremented, and the byte of data at the new address is shifted out.
When the highest address is reached, the address counter rolls over to zero, allowing the
Read cycle to be continued indefinitely. The whole memory can, therefore, be read with a
single READ instruction.
The Read cycle is terminated by driving Chip Select (S) high. The rising edge of the Chip
Select (S) signal can occur at any time during the cycle.
The first byte addressed can be any byte within any page.
The instruction is not accepted, and is not executed, if a write cycle is currently in progress.
Figure 9.
1. The most significant address bits (b15, b14) are Don’t Care.
S
C
D
Q
Figure
Read from Memory Array (READ) sequence
0
1
High Impedance
2
Instruction
9, to send this instruction to the device, Chip Select (S) is first driven low.
3
4
5
Doc ID 5798 Rev 13
6
7
MSB
15
8
14 13
9 10
16-Bit Address
3
20 21 22 23 24 25 26 27
2
1
0
MSB
7
M95128, M95128-W, M95128-R
6
5
Data Out 1
4
3
28 29 30
2
1
0
31
7
AI01793D
Data Out 2