M29W200BB90N6 STMicroelectronics, M29W200BB90N6 Datasheet - Page 11
![IC FLASH 2MBIT 90NS 48TSOP](/photos/7/26/72669/497-48-tsop_series_sml.jpg)
M29W200BB90N6
Manufacturer Part Number
M29W200BB90N6
Description
IC FLASH 2MBIT 90NS 48TSOP
Manufacturer
STMicroelectronics
Datasheet
1.M29W200BB55N1.pdf
(22 pages)
Specifications of M29W200BB90N6
Format - Memory
FLASH
Memory Type
FLASH - Nor
Memory Size
2M (256K x 8 or 128K x 16)
Speed
90ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M29W200BB90N6
Manufacturer:
TI
Quantity:
906
Figure 4. Data Polling Flowchart
Erase Timer Bit (DQ3). The Erase Timer Bit can
be used to identify the start of Program/Erase
Controller operation during a Block Erase com-
mand. Once the Program/Erase Controller starts
erasing the Erase Timer Bit is set to ’1’. Before the
Program/Erase Controller starts the Erase Timer
Bit is set to ’0’ and additional blocks to be erased
may be written to the Command Interface. The
Erase Timer Bit is output on DQ3 when the Status
Register is read.
Alternative Toggle Bit (DQ2). The
Toggle Bit can be used to monitor the Program/
Erase controller during Erase operations. The Al-
ternative Toggle Bit is output on DQ2 when the
Status Register is read.
During Chip Erase and Block Erase operations the
Toggle Bit changes from ’0’ to ’1’ to ’0’, etc., with
successive Bus Read operations from addresses
at VALID ADDRESS
at VALID ADDRESS
NO
READ DQ5 & DQ7
READ DQ7
START
DATA
DATA
FAIL
DQ7
DQ5
DQ7
= 1
=
=
YES
NO
NO
YES
YES
PASS
Alternative
AI03598
Figure 5. Data Toggle Flowchart
within the blocks being erased. Once the operation
completes the memory returns to Read mode.
During Erase Suspend the Alternative Toggle Bit
changes from ’0’ to ’1’ to ’0’, etc. with successive
Bus Read operations from addresses within the
blocks being erased. Bus Read operations to ad-
dresses within blocks not being erased will output
the memory cell data as if in Read mode.
After an Erase operation that causes the Error Bit
to be set the Alternative Toggle Bit can be used to
identify which block or blocks have caused the er-
ror. The Alternative Toggle Bit changes from ’0’ to
’1’ to ’0’, etc. with successive Bus Read Opera-
tions from addresses within blocks that have not
erased correctly. The Alternative Toggle Bit does
not change if the addressed block has erased cor-
rectly.
NO
M29W200BT, M29W200BB
DQ5 & DQ6
READ DQ6
READ DQ6
TOGGLE
TOGGLE
START
TWICE
READ
FAIL
DQ6
DQ5
DQ6
= 1
=
=
YES
YES
YES
NO
NO
PASS
AI01370B
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