CY7C1471V33-133AXCT Cypress Semiconductor Corp, CY7C1471V33-133AXCT Datasheet - Page 17

• Manufacturer Part Number: CY7C1471V33-133AXCT
• Description: IC SRAM 72MBIT 133MHZ 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1471V33-133AXCT

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Memory Size: 72M (2M x 36)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

there is no guarantee as to the value that is captured.
Repeatable results may not be possible.
To guarantee that the boundary scan register captures the
correct value of a signal, the SRAM signal must be stabilized
long enough to meet the TAP controller’s capture setup plus hold
time (t
The SRAM clock input might not be captured correctly if there is
no way in a design to stop (or slow) the clock during a
SAMPLE/PRELOAD instruction. If this is an issue, it is still
possible to capture all other signals and simply ignore the value
of the CLK captured in the boundary scan register.
After the data is captured, it is possible to shift out the data by
putting the TAP into the Shift-DR state. This places the boundary
scan register between the TDI and TDO balls.
TAP Timing
Document Number: 38-05288 Rev. *L
CS
plus t
Test M ode Select
CH
).
Test Data-Out
Test Data-In
Test Clock
(TDO)
(TM S)
(TCK )
(TDI)
1
t TM SS
t TDIS
2
t TM SH
t TDIH
t TH
DON’T CA RE
t
TL
3
Note that since the PRELOAD part of the command is not
implemented, putting the TAP to the Update-DR state while
performing a SAMPLE/PRELOAD instruction has the same
effect as the Pause-DR command.
BYPASS
When the BYPASS instruction is loaded in the instruction register
and the TAP is placed in a Shift-DR state, the bypass register is
placed between the TDI and TDO balls. The advantage of the
BYPASS instruction is that it shortens the boundary scan path
when multiple devices are connected together on a board.
Reserved
These instructions are not implemented but are reserved for
future use. Do not use these instructions.
t CY C
UNDEFINED
4
t TDOX
t TDOV
5
6
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Page 17 of 36
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