CY7C056V-12AXC Cypress Semiconductor Corp, CY7C056V-12AXC Datasheet - Page 2

• Manufacturer Part Number: CY7C056V-12AXC
• Description: IC SRAM 576KBIT 12NS 144LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C056V-12AXC

• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Asynchronous
• Memory Size: 576K (16K x 36)
• Speed: 12ns
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 144-LQFP
• Density: 576Kb
• Access Time (max): 12ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 14b
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Number Of Ports: 2
• Supply Current: 385mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Word Size: 36b
• Number Of Words: 16K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Contents
Pin Configurations ........................................................... 4
Pin Configurations ........................................................... 5
Selection Guide ................................................................ 5
Pin Definitions .................................................................. 6
Maximum Ratings............................................................. 7
Operating Range ............................................................... 7
Electrical Characteristics.................................................. 8
Capacitance ...................................................................... 8
AC Test Load and Waveforms ......................................... 9
Switching Characteristics .............................................. 10
Data Retention Mode ...................................................... 11
Timing .............................................................................. 11
Switching Waveforms .................................................... 12
Architecture .................................................................... 18
Document #: 38-06055 Rev. *E
Read Cycle No. 1 (Either Port Address Access) ........ 12
Read Cycle No. 2 (Either Port CE/OE Access) .......... 12
Read Cycle No. 3 (Either Port)................................... 12
Write Cycle No. 1: R/W Controlled Timing ................. 13
Write Cycle No. 2: CE Controlled Timing ................... 13
Semaphore Read After Write Timing, Either Side...... 14
Timing Diagram of Semaphore Contention ................ 14
Timing Diagram of Write with BUSY (M/S = HIGH).... 15
Write Timing with Busy Input (M/S = LOW) ............... 15
Busy Timing Diagram No. 1 (CE Arbitration).............. 16
Busy Timing Diagram No. 2 (Address Arbitration) ..... 16
Functional Description ................................................... 18
Right Port Configuration................................................. 20
Right Port Operation ...................................................... 20
Left Port Operation ......................................................... 20
Bus Match Operation ..................................................... 20
Ordering Information ...................................................... 22
Package Diagrams .......................................................... 23
Acronyms ........................................................................ 24
Document Conventions ................................................. 24
Sales, Solutions, and Legal Information ...................... 26
Write Operation ......................................................... 18
Read Operation ......................................................... 18
Interrupts ................................................................... 18
Busy .......................................................................... 18
Master/Slave ............................................................. 18
Semaphore Operation ............................................... 18
Long-Word (36-bit) Operation ................................... 21
Word (18-bit) Operation ............................................. 21
Byte (9-bit) Operation ................................................ 21
Ordering Code Definition ........................................... 22
Units of Measure ....................................................... 24
Worldwide Sales and Design Support ....................... 26
Products .................................................................... 26
PSoC Solutions ......................................................... 26
CY7C056V
CY7C057V
Page 2 of 26
[+] Feedback