CY7C037V-20AXC Cypress Semiconductor Corp, CY7C037V-20AXC Datasheet
CY7C037V-20AXC
Specifications of CY7C037V-20AXC
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CY7C037V-20AXC Summary of contents
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... True Dual-Ported memory cells which allow simultaneous access of the same memory location • 32K x 16 organization (CY7C027V) • 64K x 16 organization (CY7C028V) • 32K x 18 organization (CY7C037V) • 64K x 18 organization (CY7C038V) • 0.35-micron CMOS for optimum speed/power • High-speed access: 15/20/25 ns • ...
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... I/O13L 22 I/O12L 23 I/O11L 24 I/O10L Note: 5. This pin is NC for CY7C027V. Document #: 38-06078 Rev. *A 100-Pin TQFP (Top View CY7C028V (64K x 16) CY7C027V (32K x 16 CY7C027V/028V CY7C037V/038V A9R 74 A10R 73 A11R 72 A12R 71 A13R 70 A14R 69 A15R [ LBR 65 UBR 64 CE0R 63 CE1R 62 SEMR 61 GND 60 R/WR 59 OER 58 GND ...
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... Selection Guide Maximum Access Time Typical Operating Current Typical Standby Current for I (Both ports TTL level) SB1 Typical Standby Current for I (Both ports CMOS level) SB3 Note: 6. This pin is NC for CY7C037V. Document #: 38-06078 Rev. *A 100-Pin TQFP (Top View CY7C038V (64K x 18) ...
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... The interrupt is reset when the owner reads the contents of the mailbox. The message is user defined. Each port can read the other port’s mailbox without resetting the interrupt. The active state of the busy signal (to a port) prevents the port from setting the interrupt to the winning port. CY7C027V/028V CY7C037V/038V ≥ V and – ...
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... If both ports attempt to access the semaphore within t will definitely be obtained by one side or the other, but there is no guarantee which side will control the semaphore. CY7C027V/028V CY7C037V/038V before SOP + t after the rising edge of the semaphore write. ...
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... CC CY7C027V/028V CY7C037V/038V [7] .................................. –0. +0.5V CC Ambient Temperature V CC ° ° 3.3V ± 300 +70 C ° ° 3.3V ± 300 mV – +85 C CY7C037V/038V -20 -25 Typ. Max. Unit 2.4 2.4 0.4 0.4 2.2 2.2 0.8 0.8 −5 − –10 10 –10 10 120 175 115 ...
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... CY7C037V/038V -15 Min. Max. Min less than t and t is less than t HZCE LZCE HZOE CY7C027V/028V CY7C037V/038V 3. 590Ω OUTPUT 435Ω (c) Three-State Delay (Load 2) (Used for & HZWE LZWE including scope and jig) -20 -25 Max. Min. Max. Unit ...
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... For information on port-to-port delay through RAM cells from writing port to reading port, refer to Read Timing with Busy waveform. 17. Test conditions used are Load 1. 18 calculated parameter and is the greater of t BDD (actual). 19 GND but not tested. CY7C027V/028V CY7C037V/038V -20 -25 Max. Min. Max. Unit ...
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... To access RAM SEM = Document #: 38-06078 Rev. *A [20, 21, 22 DATA VALID [20, 23, 24] t ACE t DOE t LZOE t LZCE LZCE t ABE t ACE t LZCE . This waveform cannot be used for semaphore reads access semaphore SEM = CY7C027V/028V CY7C037V/038V t OHA t HZCE t HZOE DATA VALID OHA t HZCE t HZCE Page [+] Feedback ...
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... Document #: 38-06078 Rev. *A [25, 26, 27, 28 [28] t PWE [31] t HZWE t SD [25, 26, 27, 33 SCE LOW CE or SEM and a LOW PWE HZWE . CY7C027V/028V CY7C037V/038V [31] t HZOE LZWE NOTE allow the I/O drivers to turn off and data to be placed on SD PWE Page [+] Feedback ...
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... SPS Document #: 38-06078 Rev. *A [34] t SAA VALID ADRESS SCE SOP t SD DATA VALID PWE t SWRD t SOP WRITE CYCLE READ CYCLE [35, 36, 37] MATCH t SPS MATCH = CE = HIGH. L CY7C027V/028V CY7C037V/038V t OHA t ACE DATA VALID OUT t DOE Page [+] Feedback ...
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... Timing Diagram of Read with BUSY (M/S=HIGH) ADDRESS R R/W R DATA ADDRESS L BUSY L DATA OUTL Write Timing with Busy Input (M/S=LOW) R/W BUSY Note: 38 LOW Document #: 38-06078 Rev. *A [38 MATCH t PWE t SD VALID MATCH t BLA t WDD t PWE CY7C027V/028V CY7C037V/038V BHA t BDD t DDD VALID Page [+] Feedback ...
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... BUSY will be asserted. PS Document #: 38-06078 Rev. *A [39] ADDRESS MATCH BLC ADDRESS MATCH BLC [39 ADDRESS MISMATCH t t BLA BHA ADDRESS MISMATCH t t BLA BHA CY7C027V/028V CY7C037V/038V t BHC t BHC Page [+] Feedback ...
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... Notes: 40. t depends on which enable pin ( deasserted first 41 depends on which enable pin (CE or R/W INS INR L Document #: 38-06078 Rev [40 READ 7FFF (FFFF for CY7C028V/38V) [41] t INR t WC [40 READ 7FFE (FFFF for CY7C028V/38V) [41] t INR ) is asserted last. L CY7C027V/028V CY7C037V/038V Page [+] Feedback ...
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... Right port has semaphore token 1 1 Semaphore free 0 1 Left port has semaphore token 1 1 Semaphore free CY7C027V/028V CY7C037V/038V –I/O Operation 8 Deselected: Power-Down Deselected: Power-Down Write to Upper Byte Only Write to Lower Byte Only Write to Both Bytes Read Upper Byte Only Read Lower Byte Only ...
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... CY7C028V-15AC CY7C028V-15AXC 20 CY7C028V-20AC CY7C028V-20AXC CY7C028V-20AI CY7C028V-20AXI 25 CY7C028V-25AC CY7C028V-25AXC 32K x18 3.3V Asynchronous Dual-Port SRAM Speed (ns) Ordering Code 15 CY7C037V-15AC CY7C037V-15AXC 20 CY7C037V-20AC CY7C037V-20AXC 25 CY7C037V-25AC CY7C037V-25AXC 64K x18 3.3V Asynchronous Dual-Port SRAM Speed (ns) Ordering Code 15 CY7C038V-15AC CY7C038V-15AXC 20 CY7C038V-20AC CY7C038V-20AXC CY7C038V-20AI CY7C038V-20AXI 25 CY7C038V-25AC CY7C038V-25AXC Document #: 38-06078 Rev. *A ...
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... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. CY7C027V/028V CY7C037V/038V 51-85048-*B Page ...
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... Document History Page Document Title: CY7C027V/CY7C028V/CY7C037V/CY7C038V 3.3V 32K/64K x 16/18 Dual Port Static RAM Document Number: 38-06078 REV. ECN NO. Issue Date ** 237626 6/30/04 *A 259110 See ECN Document #: 38-06078 Rev. *A Orig. of Change Description of Change YDT Converted data sheet from old spec 38-00670 to conform with new data sheet ...