PSD835G2-90UI STMicroelectronics, PSD835G2-90UI Datasheet - Page 74

• Manufacturer Part Number: PSD835G2-90UI
• Description: IC FLASH 4MBIT 90NS 80TQFP
• Manufacturer: STMicroelectronics

Specifications of PSD835G2-90UI

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 4M (512K x 8)
• Speed: 90ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-2016

MCU bus interface
16.7
Figure 24. Interfacing the PSD with a 68HC11
74/120
RESET
CRYSTAL
68HC11
Figure 24
multiplexed mode with E and R/W settings. The DPLD can be used to generate the READ
and WR signals for external devices.
18
19
43
44
45
46
47
48
50
49
20
21
22
23
24
25
52
51
2
3
8
7
34
33
32
31
30
29
28
27
VRH
VRL
MODB
MODA
PA3
PA0
PA1
PA2
PA4
PA5
PA6
PA7
PE6
PE7
IRQ
XIRQ
PE0
PE1
PE2
PE3
PE4
PE5
XT
EX
PD0
PD1
PD3
PD4
PD5
shows a bus interface to a 68HC11 where the PSD is configured in 8-bit
PD2
80C31
RESET
R/W
PC0
PC3
PC4
PC5
PC6
PC7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC1
PC2
AS
E
RESET
9
10
11
12
13
14
15
16
42
41
40
39
38
37
36
35
6
5
4
RESET
AS
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
E
R/W
A8
A9
A10
A11
A12
A13
A14
A15
39
10
11
12
16
77
78
13
14
15
17
18
19
71
72
73
74
75
76
20
40
59
60
79 PD0 (AS)
80
3
4
5
6
7
1
2
PSD
ADIO0 (2)
ADIO1
ADIO3
ADIO4
ADIO5
ADIO6
ADIO7
PE6
PE7
ADIO2
PE0 (TMS)
PE1 (TCK/ST)
PE2 (TDI)
PE3 (TDO)
PE4 (TSTAT/RDY)
PE5 (TERR)
ADIO8
ADIO9
ADIO10
ADIO11
ADIO12
ADIO13
ADIO14
ADIO15
CNTL0 (R/W)
CNTL1(RD)
CNTL2 (E)
PD1 (CLKIN)
PD2 (CS)
PD3
RESET
GND GND GND GND GND
A15-A8
AD7-AD0
V CC
8
9
V CC
30
V CC
29
49
V CC
69
50
PF0
PF1
PF2
PF3
PF4
PF5
PF6
PF7
PG0
PG1
PG2
PG3
PG4
PG5
PG6
PG7
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
70
31
32
33
34
35
36
37
38
42
43
44
45
46
47
48
52
53
54
55
56
57
58
67
21
22
23
24
25
26
27
28
61
62
63
64
65
66
68
41
51
A [3 :0 ]
PSD835G2
A [ 15:8]
AI02884e