CY7C185-25VC Cypress Semiconductor Corp, CY7C185-25VC Datasheet - Page 5

• Manufacturer Part Number: CY7C185-25VC
• Description: IC SRAM 64KBIT 25NS 28SOJ
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C185-25VC

• Format - Memory: RAM
• Memory Type: SRAM - Asynchronous
• Memory Size: 64K (8K x 8)
• Speed: 25ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOJ
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1056

Switching Waveforms
Document #: 38-05043 Rev. *A
Read Cycle No.1
Read Cycle No.2
Write Cycle No. 1 (WE Controlled)
10. Device is continuously selected. OE, CE
12. Data I/O is High Z if OE = V
13. The internal write time of the memory is defined by the overlap of CE
14. During this period, the I/Os are in the output state and input signals should not be applied.
11. WE is HIGH for read cycle.
ADDRESS
DATA OUT
DATA OUT
CURRENT
ADDRESS
DATA I/O
SUPPLY
to initiate write. A write can be terminated by CE
rising edge of the signal that terminates the write.
CE
CE
CE
CE
WE
V
OE
OE
CE
OE
CC
1
2
1
2
[10,11]
[12,13]
PREVIOUS DATA VALID
HIGH IMPEDANCE
NOTE 14
IH
t
PU
, CE
t
1
LZCE
t
SA
= V
t
HZOE
IH
[11,13]
1
t
t
, WE = V
LZOE
ACE
= V
IL
t
OHA
50%
. CE
t
1
DOE
or WE going HIGH or CE
IL
2
, or CE
= V
IH
t
.
2
AA
t
=V
AW
IL
.
t
SCE2
t
t
SCEI
RC
1
LOW, CE
t
WC
2
going LOW. The data input set-up and hold timing should be referenced to the
DATA
t
RC
2
t
PWE
HIGH and WE LOW. CE
t
SD
IN
VALID
DATA VALID
1
and WE must be LOW and CE
t
t
DATA VALID
HA
HZOE
t
HD
t
HZCE
t
PD
50%
CY7C185
IMPEDANCE
2
must be HIGH
Page 5 of 11
HIGH
ICC
ISB