MT41J256M8JE-187E:A Micron Technology Inc, MT41J256M8JE-187E:A Datasheet - Page 113

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MT41J256M8JE-187E:A

Manufacturer Part Number
MT41J256M8JE-187E:A
Description
IC DDR3 SDRAM 2GBIT 82FBGA
Manufacturer
Micron Technology Inc
Type
DDR3 SDRAMr

Specifications of MT41J256M8JE-187E:A

Format - Memory
RAM
Memory Type
DDR3 SDRAM
Memory Size
2G (256M x 8)
Speed
533MHz
Interface
Parallel
Voltage - Supply
1.425 V ~ 1.575 V
Operating Temperature
0°C ~ 95°C
Package / Case
82-FBGA
Organization
256Mx8
Address Bus
18b
Maximum Clock Rate
1.066GHz
Operating Supply Voltage (typ)
1.5V
Package Type
FBGA
Operating Temp Range
0C to 95C
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Supply Current
295mA
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4329252

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT41J256M8JE-187E:A
Manufacturer:
MICRON
Quantity:
985
Part Number:
MT41J256M8JE-187E:A
Manufacturer:
Micron Technology Inc
Quantity:
10 000
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf – Rev. K 04/10 EN
10. The DES and NOP commands perform similarly.
11. The power-down mode does not perform any REFRESH operations.
12. ZQ CALIBRATION LONG is used for either ZQinit (first ZQCL command during initializa-
2. RESET# is LOW enabled and used only for asynchronous reset. Thus, RESET# must be
3. The state of ODT does not affect the states described in this table.
4. Operations apply to the bank defined by the bank address. For MRS, BA selects one of
5. “V” means “H” or “L” (a defined logic level), and “X” means “Don’t Care.”
6. See Table 70 (page 114) for additional information on CKE transition.
7. Self refresh exit is asynchronous.
8. Burst READs or WRITEs cannot be terminated or interrupted. MRS (fixed) and OTF BL/BC
9. The purpose of the NOP command is to prevent the DRAM from registering any unwan-
held HIGH during any normal operation.
four mode registers.
are defined in MR0.
ted commands. A NOP will not terminate an operation that is executing.
tion) or ZQoper (ZQCL command after initialization).
113
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2Gb: x4, x8, x16 DDR3 SDRAM
Commands – Truth Tables
© 2006 Micron Technology, Inc. All rights reserved.

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