IS62C256-70U ISSI, Integrated Silicon Solution Inc, IS62C256-70U Datasheet - Page 6

• Manufacturer Part Number: IS62C256-70U
• Description: IC SRAM 256KBIT 70NS 28SOP
• Manufacturer: ISSI, Integrated Silicon Solution Inc

Specifications of IS62C256-70U

• Format - Memory: RAM
• Memory Type: SRAM - Asynchronous
• Memory Size: 256K (32K x 8)
• Speed: 70ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

IS62C256
AC WAVEFORMS
WRITE CYCLE NO. 1
6
WRITE CYCLE SWITCHING CHARACTERISTICS
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and
2. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of
4. Tested with
Symbol Parameter
t
t
t
t
t
t
t
t
output loading specified in Figure 1.
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling
edge of the signal that terminates the write.
WC
SCS
AW
HA
SA
PWE
SD
HD
(4)
ADDRESS
Write Cycle Time
CS
Address Setup Time to Write End
Address Hold from Write End
Address Setup Time
WE
Data Setup to Write End
Data Hold from Write End
D
to Write End
Pulse Width
OE
OUT
WE
D
CS
IN
HIGH.
(
CS
DATA UNDEFINED
t
SA
Controlled,
OE
Min.
is HIGH or LOW)
45
35
25
25
20
0
0
0
-45 ns
CS
t
HZWE
LOW and
Max.
t
VALID ADDRESS
—
—
—
—
—
—
—
—
AW
t
t
PWE1
PWE2
t
t
SCS
WC
WE
(1,3)
HIGH-Z
(1 )
LOW. All signals must be in valid states to initiate a Write,
Integrated Silicon Solution, Inc. — 1-800-379-4774
(Over Operating Range)
Min.
t
70
60
60
55
30
0
0
0
SD
DATA
-70ns
IN
Max.
—
—
—
—
—
—
—
—
VALID
t
HD
t
LZWE
t
HA
Unit
ns
ns
ns
ns
ns
ns
ns
ns
CS_WR1.eps
ISSI
SR072-1E
05/12/99
®