AT26DF081A-SSU Atmel, AT26DF081A-SSU Datasheet - Page 15

• Manufacturer Part Number: AT26DF081A-SSU
• Description: IC FLASH 8MBIT 70MHZ 8SOIC
• Manufacturer: Atmel

Specifications of AT26DF081A-SSU

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 8M (4096 pages x 256 bytes)
• Speed: 70MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9. Protection Commands and Features
9.1
3600G–DFLASH–06/09
Write Enable
Figure 8-6.
The Write Enable command is used to set the Write Enable Latch (WEL) bit in the Status Regis-
ter to a logical “1” state. The WEL bit must be set before a program, erase, Protect Sector,
Unprotect Sector, or Write Status Register command can be executed. This makes the issuance
of these commands a two step process, thereby reducing the chances of a command being
accidentally or erroneously executed. If the WEL bit in the Status Register is not set prior to the
issuance of one of these commands, then the command will not be executed.
To issue the Write Enable command, the CS pin must first be asserted and the opcode of 06h
must be clocked into the device. No address bytes need to be clocked into the device, and any
data clocked in after the opcode will be ignored. When the CS pin is deasserted, the WEL bit in
the Status Register will be set to a logical “1”. The complete opcode must be clocked into the
device before the CS pin is deasserted, and the CS pin must be deasserted on an even byte
boundary (multiples of eight bits); otherwise, the device will abort the operation and the state of
the WEL bit will not change.
Figure 9-1.
Chip Erase
Write Enable
SCK
SCK
SO
SO
CS
CS
SI
SI
HIGH-IMPEDANCE
HIGH-IMPEDANCE
MSB
MSB
C
0
0
0
C
0
1
1
C
0
2
2
OPCODE
OPCODE
C
0
3
3
C
0
4
4
C
1
5
5
C
1
6
6
C
0
7
7
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