DS28E04S-100+T Maxim Integrated Products, DS28E04S-100+T Datasheet - Page 7

IC EEPROM 4KBIT 16SOIC

DS28E04S-100+T

Manufacturer Part Number
DS28E04S-100+T
Description
IC EEPROM 4KBIT 16SOIC
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS28E04S-100+T

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
4K (256 x 16)
Interface
1-Wire Serial
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Speed
-
DS28E04-100: 4096-Bit 1-Wire Addressable EEPROM with PIO
Figure 4. 1-Wire CRC Generator
8
5
4
Polynomial = X
+ X
+ X
+ 1
st
nd
rd
th
th
th
th
th
1
2
3
4
5
6
7
8
STAGE
STAGE
STAGE
STAGE
STAGE
STAGE
STAGE
STAGE
0
1
2
3
4
5
6
7
8
X
X
X
X
X
X
X
X
X
INPUT DATA
MEMORY
The DS28E04-100 EEPROM array consists of 17 pages of 32 bytes each, starting at address 0000h and ending at
address 021Fh. All memory addresses in this range have unrestricted read access. The data memory consists of
16 pages of 32 bytes each. The register page consists of 32 bytes starting at address 0200h. It contains 16 page
protection control bytes (one for each data memory page), the register page lock byte, the factory bytes, and the
reserved bytes. The reserved bytes are for future use by the factory and should be not be used. They have no
effect on device operation.
The protection control registers, along with the register page lock byte, determine whether write protection, EPROM
mode, or copy protection is enabled for each of the 16 data memory pages. A value of 55h sets write protection for
the associated memory page. A value of AAh sets EPROM mode. A value of 55h or AAh for the register page lock
byte sets copy protection for all write-protected data memory pages, as well as the register page. EPROM mode
pages are not affected. The protection control registers and the register page lock byte write protect themselves if
set to 55h or AAh. Any other setting leaves them open for unrestricted write access.
In addition to the EEPROM, the device has a 32-byte volatile scratchpad. Writes to the EEPROM array are a two-
step process. First, data is written to the scratchpad through the Write Scratchpad command, and then copied into
the main array through the Copy Scratchpad command. The user can verify the data written to the scratchpad
through the Read Scratchpad command prior to copying into the main array.
If a memory location is write protected, data sent by the master to the associated address during a Write
Scratchpad command is not loaded into the scratchpad. Instead, it is replaced by the data in EEPROM located at
the target address. If a memory location is in EPROM mode, the scratchpad is loaded with the logical AND of the
data sent by the master and the data in EEPROM at the target address. Copy Scratchpad commands to write-
protected or EPROM mode memory locations are allowed. This allows write-protected data in the device to be
refreshed, i.e., reprogrammed with the current data.
If a memory location is copy protected, a Copy Scratchpad command to that location will be blocked, which is
indicated by FFh success bytes. Copy protection is used for a higher level of security, and should only be used
after all write-protected pages and their associated protection control bytes are set to their final values. Copy
protection as implemented with this device does not prevent copying data from one device to another; it only blocks
the execution of the copy scratchpad command with a target address of a copy-protected memory page.
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