CY7C1371D-100AXC Cypress Semiconductor Corp, CY7C1371D-100AXC Datasheet - Page 32

• Manufacturer Part Number: CY7C1371D-100AXC
• Description: IC SRAM 18MBIT 100MHZ 100LQFP
• Manufacturer: Cypress Semiconductor Corp
• Type: Synchronousr

Specifications of CY7C1371D-100AXC

• Memory Size: 18M (512K x 36)
• Package / Case: 100-LQFP
• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Speed: 100MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Access Time: 8.5 ns
• Maximum Clock Frequency: 100 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3.135 V
• Maximum Operating Current: 175 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Number Of Ports: 4
• Operating Supply Voltage: 3.3 V
• Memory Configuration: 1M X 18 / 512K X 36
• Clock Frequency: 100MHz
• Supply Voltage Range: 3.135V To 3.6V
• Memory Case Style: TQFP
• No. Of Pins: 100
• Rohs Compliant: Yes
• Density: 18Mb
• Access Time (max): 8.5ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 100MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 19b
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Supply Current: 175mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 36b
• Number Of Words: 512K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 428-1631

Document History Page
Document Number: 38-05556 Rev. *I
Document Title: CY7C1371D/CY7C1373D 18-Mbit (512 K × 36/1 M × 18)
Flow-through SRAM with NoBL™ Architecture
Document Number: 38-05556
REV.
*A
*B
*C
*D
*E
*G
*H
*F
**
*I
ECN NO.
1274734
2897120
3033272
3067448
254513
288531
326078
345117
416321
475677
Submission
03/22/2010
09/19/2010
10/21/2010
See ECN
See ECN
See ECN
See ECN
See ECN
See ECN
See ECN
Date
VKN/AESA Corrected typo in the “NOP, STALL and DESELECT Cycles” waveform
Change
Orig. of
NXR
VKN
RKF
SYT
NJY
NJY
NJY
PCI
PCI
New data sheet
Added
Updated
Edited description under “IEEE 1149.1 Serial Boundary Scan (JTAG)” for
non-compliance with 1149.1
Removed 117 Mhz Speed Bin
Added Pb-free information for 100-Pin TQFP, 119 BGA and 165 FBGA Packages
Added comment of ‘Pb-free BG packages availability’ below the Ordering Infor-
mation
Address expansion pins/balls in the pinouts for all packages are modified
according to JEDEC standard
Added description on EXTEST Output Bus Tri-State
Changed description on the Tap Instruction Set Overview and Extest
Changed 
C/W respectively
Changed 
respectively
Changed 
C/W respectively
Modified V
Removed comment of ‘Pb-free BG packages availability’ below the Ordering Infor-
mation
Updated Ordering Information Table
Updated Ordering Information Table
Changed from Preliminary to Final
Changed address of Cypress Semiconductor Corporation on Page# 1 from “3901
North First Street” to “198 Champion Court”
In the Partial Truth Table for Read/Write on page # 10, the BW
(DQ
from H to L
Changed the description of I
on page# 20
Changed the Ix current values of MODE on page # 20 from -5 A and 30 A
to -30 A and 5 A
Changed the Ix current values of ZZ on page # 20 from -30 A and 5 A
to -5 A and 30 A
Changed V
Replaced Package Name column with Package Diagram in the Ordering
Information table
Updated Ordering Information Table
Added the Maximum Rating for Supply Voltage on V
Changed t
Switching Characteristics table.
Updated the Ordering Information table.
Removed inactive parts from Ordering Information table; Updated package
diagram.
Added
Minor edits and updated in new template.
A
and DQP
Ordering Code
Acronyms
Ordering
TH
OL,
JA
IH
JA
JA
, t
< V
and 
and 
and 
V
TL
A
OH
) and BW
DD
from 25 ns to 20 ns and t
and
Information.
test conditions
JC
JC
JC
to V
for BGA Package from 45 and 7 C/W to 23.8 and 6.2 C/W
Units of
Definitions.
for TQFP Package from 31 and 6 C/W to 28.66 and 4.08
for FBGA Package from 46 and 3 C/W to 20.7 and 4.0
IH
B
< V
of Write Byte B – (DQ
Description of Change
X
from Input Load Current to Input Leakage Current
DD
Measure.
on page # 20
TDOV
from 5 ns to 10 ns in TAP AC
B
and DQP
DDQ
Relative to GND
B
) has been changed
CY7C1371D
CY7C1373D
A
of Write Byte A –
Page 32 of 33
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