MT46V128M4BN-5B:F Micron Technology Inc, MT46V128M4BN-5B:F Datasheet - Page 64
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MT46V128M4BN-5B:F
Manufacturer Part Number
MT46V128M4BN-5B:F
Description
IC DDR SDRAM 512MBIT 5NS 60FBGA
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet
1.MT46V32M16P-5BF_TR.pdf
(91 pages)
Specifications of MT46V128M4BN-5B:F
Format - Memory
RAM
Memory Type
DDR SDRAM
Memory Size
512M (128Mx4)
Speed
5ns
Interface
Parallel
Voltage - Supply
2.5 V ~ 2.7 V
Operating Temperature
0°C ~ 70°C
Package / Case
60-FBGA
Organization
128Mx4
Density
512Mb
Address Bus
15b
Access Time (max)
700ps
Maximum Clock Rate
400MHz
Operating Supply Voltage (typ)
2.6V
Package Type
FBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.5V
Supply Current
195mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT46V128M4BN-5B:F
Manufacturer:
MICRON
Quantity:
1 218
Company:
Part Number:
MT46V128M4BN-5B:F
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Part Number:
MT46V128M4BN-5B:F
Manufacturer:
MICRON/镁光
Quantity:
20 000
Company:
Part Number:
MT46V128M4BN-5B:F TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Figure 29:
PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN
Command
Command
Command
Address
Address
Address
DQS
DQS
DQS
CK#
CK#
CK#
DQ
DQ
DQ
CK
CK
CK
Nonconsecutive READ Bursts
Notes:
Bank,
Bank,
Bank,
Col n
Col n
READ
Col n
READ
READ
T0
T0
T0
1. DO n (or b) = data-out from column n (or column b).
2. BL = 4 or BL = 8 (if BL = 4, the bursts are concatenated; if BL = 8, the second burst interrupts
3. Three subsequent elements of data-out appear in the programmed order following DO n.
4. Three (or seven) subsequent elements of data-out appear in the programmed order follow-
5. Shown with nominal
the first).
ing DO b.
CL = 2
NOP
NOP
NOP
T1
T1
T1
CL = 2.5
CL = 3
NOP
NOP
NOP
T2
T2
T2
t
AC,
DO
n
t
T2n
T2n
DQSCK, and
64
DO
n
Bank,
Col b
Bank,
Col b
Bank,
Col b
READ
READ
READ
T3
T3
T3
DO
n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
DQSQ.
T3n
T3n
T3n
512Mb: x4, x8, x16 DDR SDRAM
T4
T4
T4
NOP
NOP
NOP
Transitioning Data
T4n
T5
T5
T5
NOP
NOP
NOP
©2000 Micron Technology, Inc. All rights reserved.
DO
b
T5n
T5n
Don’t Care
DO
b
Operations
T6
T6
T6
NOP
NOP
NOP
DO
b