MT46H8M32LFB5-5 IT:H Micron Technology Inc, MT46H8M32LFB5-5 IT:H Datasheet - Page 95
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MT46H8M32LFB5-5 IT:H
Manufacturer Part Number
MT46H8M32LFB5-5 IT:H
Description
IC DDR SDRAM 256MBIT 90VFBGA
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet
1.MT46H16M16LFBF-5H.pdf
(96 pages)
Specifications of MT46H8M32LFB5-5 IT:H
Format - Memory
RAM
Memory Type
Mobile DDR SDRAM
Memory Size
256M (8Mx32)
Speed
200MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Package / Case
90-VFBGA
Organization
8Mx32
Density
256Mb
Address Bus
14b
Access Time (max)
6.5/5ns
Maximum Clock Rate
200MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
180mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Revision History for Commands, Operations, and Timing Diagrams
Update – 01/09
Update – 07/08
Update – 05/08
Update – 03/08
Update – 12/07
PDF: 09005aef834bf85b
256mb_mobile_ddr_sdram_t36n.pdf - Rev. H 11/09 EN
• Initialization: Updated item 1 relative to CKE.
• SELF REFRESH Command section: Updated description.
• Truth Tables (Current State Bank n – Command to Bank n and Current State Bank n –
• Self Refresh: Updated description.
• Truth Table, Current State Bank n – Command to Bank m: Corrected note 3b,
• Auto Precharge: Added third paragraph regading
• Bank Write – Without Auto Precharge: Corrected note 4.
• Functional Description, Burst Definition table, Extended Mode Register, and through-
• Output Drive Strength: Added three-quarter drive strength and deleted one-eighth
• Extended Mode Register Figure: Expanded driver strength section to include three-
• Updated note 2 for the following figures:
• Updated note 3 for the following figures:
• Removed final note for the following figures:
• Figure 43, WRITE-to-PRECHARGE – Odd Number of Data, Interrupting: Extended
• Concurrent Auto Precharge: Updated figure references.
• Figure 19, Extended Mode Register: Updated to include mid-strength driver informa-
Command to Bank m): Clarified note 1.
changed "disabled" to "enabled."
out document as appropriate: Added BL 16.
drive strength; added 37 ohm (deleted 100 ohm).
quarter drive strength.
– Consecutive READ Bursts
– Nonconsecutive READ Bursts
– Random READ Accesses
– Terminating a READ Burst
– READ-to-PRECHARGE
– READ-to-WRITE
– Random WRITE Cycles
– WRITE-to-READ
– WRITE-to-READ – Odd Number of Data, Interrupting
– WRITE-to-PRECHARGE – Interrupting
t
tion.
WR to coincide with T5 transition.
95
256Mb: x16, x32 Mobile LPDDR SDRAM
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
RAS lock-out.
©2008 Micron Technology, Inc. All rights reserved.
Revision History