IS42S16100E-7BLI ISSI, Integrated Silicon Solution Inc, IS42S16100E-7BLI Datasheet - Page 44
![IC SDRAM 16MBIT 143MHZ 60BGA](/photos/7/28/72808/is42s16100e-7bli_sml.jpg)
IS42S16100E-7BLI
Manufacturer Part Number
IS42S16100E-7BLI
Description
IC SDRAM 16MBIT 143MHZ 60BGA
Manufacturer
ISSI, Integrated Silicon Solution Inc
Type
SDRAMr
Specifications of IS42S16100E-7BLI
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
16M (1M x 16)
Speed
143MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
60-BGA
Organization
1Mx16
Density
16Mb
Address Bus
12b
Access Time (max)
6/5.5ns
Maximum Clock Rate
143MHz
Operating Supply Voltage (typ)
3.3V
Package Type
Mini BGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
150mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
706-1070
IS42S16100E-7BLI
IS42S16100E-7BLI
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IS42S16100E-7BLI
Manufacturer:
TI
Quantity:
45
Company:
Part Number:
IS42S16100E-7BLI
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
Part Number:
IS42S16100E-7BLI
Manufacturer:
ISSI
Quantity:
20 000
Company:
Part Number:
IS42S16100E-7BLI-TR
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
IS42S16100E, IC42S16100E
Read Cycle / Ping-Pong Operation (Bank Switching)
44
Note 1: A8,A9 = Don’t Care.
CAS latency = 2, burstlength = 2
A0-A9
DQM
CKE
RAS
CAS
CLK
A10
A11
WE
DQ
CS
t
CKS
t
CS
T0
t
t
t
t
t
t
t
t
CS
CS
CS
AS
AS
t
AS
CKA
CH
CK
<
BANK 0
ACT 0
ROW
ROW
T1
(BANK 0 TO 1)
t
CHI
>
(BANK 0)
(BANK 0)
(BANK 0)
t
t
t
t
t
RRD
RCD
t
t
t
t
RAS
t
AH
AH
CH
CH
CH
AH
RC
T2
t
CL
t
CS
<
<
AUTO PRE
READA 0
COLUMN
NO PRE
BANK 0
READ 0
T3
(1)
(BANK 1)
>
>
t
CAC
t
QMD
t
LZ
<
BANK 1
ACT1
ROW
ROW
T4
>
t
AC
(BANK 1)
t
RCD
T5
D
OUT
t
OH
0m
(BANK 1)
(BANK 1)
t
AC
t
RAS
t
RC
<
Integrated Silicon Solution, Inc. — www.issi.com
AUTO PRE
<
NO PRE
READA 1
COLUMN
READ 1
BANK 1
T6
D
OUT
t
(1)
0m+1
OH
>
(BANK 1)
>
t
t
HZ
CAC
BANK 0 OR 1
<
BANK 0
PRE 0
T7
>
(BANK 0)
t
AC
t
RP
t
LZ
t
CH
T8
D
OUT
t
OH
1m
t
AC
<
BANK 0
ACT 0
ROW
ROW
T9
D
OUT
t
>
OH
1m+1
(BANK 0)
(BANK 0)
(BANK 0)
t
t
t
HZ
RCD
RAS
t
RC
BANK 0 OR 1
Undefined
Don't Care
T10
<
BANK 1
PRE 1
>
(BANK1)
t
RP
01/22/08
Rev. C