IS43R16800C-5TL ISSI, Integrated Silicon Solution Inc, IS43R16800C-5TL Datasheet - Page 22

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IS43R16800C-5TL

Manufacturer Part Number
IS43R16800C-5TL
Description
IC DDR SDRAM 128MBIT 66TSOP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Datasheet

Specifications of IS43R16800C-5TL

Format - Memory
RAM
Memory Type
DDR SDRAM
Memory Size
128M (8Mx16)
Speed
200MHz
Interface
Parallel
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
0°C ~ 70°C
Package / Case
66-TSOPII
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
IS43R16800C
IC43R16800C
22
Operation of the DDR SDRAM
Power-up Sequence
(1) Apply power and maintain CKE at an LVCMOS low state (all other inputs are undefined).
(2) Start clock and maintain stable condition for a minimum of 200 µs.
(3) After the minimum 200 µs of stable power and clock (CK, /CK), apply NOP and take CKE high.
(4) Issue precharge all command for the device.
(5) Issue EMRS to enable DLL.
(6) Issue a mode register set command (MRS) for "DLL reset" with bit A8 set to high (An additional 200 cycles of
(7) Issue precharge all command for the device.
(8) Issue 2 or more auto-refresh commands.
(9) Issue a mode register set command to initialize device operation with bit A8 set to low in order to avoid resetting
Command
Apply VDD before or at the same time as VDDQ.
Apply VDDQ before or at the same time as VTT and VREF.
clock input is required to lock the DLL after every DLL reset).
the DLL.
/CK
CK
PALL
(4)
2 cycles (min.)
DLL enable
EMRS
(5)
2 cycles (min.)
DLL reset with A8 = High
Power-up Sequence after CKE Goes High
(6)
MRS
2 cycles (min.)
PALL
(7)
t
RP
200 cycles (min)
REF
REF
(8)
Integrated Silicon Solution, Inc. — www.issi.com
t
RFC
REF
t
RFC
Disable DLL reset with A8 = Low
MRS
(9)
2 cycles (min.)
command
Any
Rev. A
10/13/08

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