IS42S16100E-7TLI ISSI, Integrated Silicon Solution Inc, IS42S16100E-7TLI Datasheet - Page 7

IC SDRAM 16MBIT 143MHZ 50TSOP

IS42S16100E-7TLI

Manufacturer Part Number
IS42S16100E-7TLI
Description
IC SDRAM 16MBIT 143MHZ 50TSOP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Type
SDRAMr
Datasheets

Specifications of IS42S16100E-7TLI

Format - Memory
RAM
Memory Type
SDRAM
Memory Size
16M (1M x 16)
Speed
143MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
50-TSOPII
Organization
1Mx16
Density
16Mb
Address Bus
12b
Access Time (max)
6/5.5ns
Maximum Clock Rate
143MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
150mA
Pin Count
50
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
706-1072
IS42S16100E-7TLI

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IS42S16100E, IS45S16100E
DC ELECTRICAL CHARACTERISTICS
Notes:
1. These are the values at the minimum cycle time. Since the currents are transient, these values decrease as the cycle time in-
2. Icc
Integrated Silicon Solution, Inc. — www.issi.com
Rev. E
05/18/2010
Symbol Parameter
i
i
V
V
i
i
I
i
I
i
il
ol
cc1
cc2p
cc2ps
cc3N
cc3Ns
cc4
oh
ol
creases. Also note that a bypass capacitor of at least 0.01 µF should be inserted between V
to suppress power supply voltage noise (voltage drops) due to these transient currents.
1
and Icc
Input Leakage Current
Output Leakage Current
Output High Voltage Level i
Output Low Voltage Level i
Operating Current
Precharge Standby Current CKE ≤ V
(In Power-Down Mode)
Active Standby Current
(In Non Power-Down Mode)
Operating Current
(In Burst Mode)
4
depend on the output load. The maximum values for Icc
(1)
(1,2)
Test Condition
0V ≤ V
the tested pin at 0V
Output is disabled, 0V ≤ V
One Bank Operation, CAS latency = 3 Com.
Burst Length=1
t
I
CKE ≥ V
t
I
out
out
rc
out
ck
out
= t
≥ t
= –2 mA
= +2 mA
= 0mA
= 0mA
rc
ck
iN
il
ih
≤ VDD, with pins other than
(
(min.)
miN
(
(
(Recommended Operation Conditions unless otherwise noted.)
miN
max
)
)
)
t
t
t
t
CAS latency = 3 Com
CAS latency = 2 Com
ck
ck
ck
ck
out
1
= t
= ∞
= t
= ∞
and Icc
ck
ck
≤ VDD
(
(
miN
miN
4
)
)
are obtained with the output open state.
Ind, A1
Ind, A1
Ind, A1
Ind, A1
Ind, A1
Ind, A1
Ind, A1
Ind, A1
Ind, A1
Com.
Com.
Com
Com
Com
Com
Com
Com
Com
A2
A2
A2
A2
A2
A2
A2
A2
Speed
DD
-5
-6
-7
-6
-6
-7
-7
-5
-6
-6
-6
-7
-7
-7
-5
-6
-6
-6
-7
-7
-7
and GND for each memory chip
Min.
2.4
–5
–5
Max.
170
160
140
170
180
160
170
170
150
170
180
130
150
160
170
150
170
180
130
150
160
0.4
40
30
30
30
5
5
3
4
2
Unit
mA
mA
mA
mA
mA
µA
µA
V
V
7

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