ADP5062CP-EVALZ Analog Devices, ADP5062CP-EVALZ Datasheet - Page 9

• Manufacturer Part Number: ADP5062CP-EVALZ
• Description: Power Management IC Development Tools ADP5062 Evaluation board
• Manufacturer: Analog Devices
• Type: Linear Regulators - Standardr
• Series: ADP5062r

Specifications of ADP5062CP-EVALZ

• Rohs: yes
• Product: Evaluation Boards
• Tool Is For Evaluation Of: ADP5062
• Input Voltage: 4 V to 6.7 V
• Description/function: Battery charger (isolated flyback)
• Interface Type: I2C
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Output Current: 2.1 A
• Factory Pack Quantity: 1
• For Use With: ADP5062

Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 6. Pin Function Descriptions
1
2
3
4
Pin No.
9, 10, 11
6, 7, 8
20
12, 13, 14
1
17
5
3
2
18
4
15
16
19
N/A
I is input, O is output, I/O is input/output, G is ground, and GPIO is the factory programmable general-purpose input/output.
See the Digital Input and Output Options section for details.
The DIG_IOx setting defines the initial state of the ADP5062. If the parameter or the mode that is related to each DIG_IOx pin setting is changed (by programming an
equivalent I
DIG_IOx pin.
N/A means not applicable.
4
2
C register bit or bits), the I
Name
ISO_S1, ISO_S2,
ISO_S3
VIN1, VIN2, VIN3
AGND
ISO_B1, ISO_B2,
ISO_B3
SCL
SDA
DIG_IO1
DIG_IO2
DIG_IO3
THR
BAT_SNS
ILED
SYS_EN
CBP
EP
Type
I/O
I/O
G
I/O
I
I/O
GPIO
GPIO
GPIO
I
I
O
O
I/O
N/A
2
C register setting takes precedence over the DIG_IOx pin setting. VINx connection or disconnection resets control to the
4
1
Description
Linear Charger Supply Side Input to Internal Isolation FET/Battery Current Regulation FET. High
current input/output.
Power Connections to USB VBUS. These pins are high current inputs when in charging mode.
Analog Ground.
Battery Supply Side Input to Internal Isolation FET/Battery Current Regulation FET.
I
I
Set Input Current Limit. This pin sets the input current limit directly. When DIG_IO1 = low or
high-Z, the input limit is 100 mA. When DIG_IO1 = high, the input limit is 500 mA.
Disable IC1. The DIG_IO2 pin sets the charger to the low current mode. When DIG_IO2 = low or
high-Z, the charger operates in normal mode. When DIG_IO2 = high, the LDO and the charger are
disabled and VINx current consumption is 280 µA (typical). In addition, when DIG_IO2 is high,
20 V VINx input protection is disabled and the VINx voltage level must fulfill the condition,
V
Enable Charging. When DIG_IO3 = low or high-Z, charging is disabled. When DIG_IO3 = high,
charging is enabled.
Battery Pack Thermistor Connection. If this pin is not used, connect a dummy 10 kΩ resistor from
THR to GND.
Battery Voltage Sense Pin.
Open-Drain Output to Indicator LED.
System Enable. This pin is the battery OK flag/open-drain pull-down FET to enable the system
when the battery reaches the V
Bypass Capacitor Input.
Exposed Pad. Connection of the exposed pad is not required. The exposed pad can be connected
to analog ground to improve heat dissipation from the package to the board.
NOTES
1. CONNECTION OF THE EXPOSED PAD IS NOT REQUIRED. THE
2
2
C-Compatible Interface Serial Clock.
C-Compatible Interface Serial Data.
ISO_Bx
EXPOSED PAD CAN BE CONNECTED TO ANALOG GROUND TO
IMPROVE HEAT DISSIPATION FROM THE PACKAGE TO BOARD.
< V
BAT_SNS
DIG_IO3
DIG_IO2
DIG_IO1
VINx
SCL
< 5.5 V.
1
2
3
4
5
Figure 3. Pin Configuration
Rev. 0 | Page 9 of 44
(Not to Scale)
2, 3
2, 3
ADP5061
TOP VIEW
PIN 1
INDICATOR
WEAK
15 ILED
14 ISO_B3
13 ISO_B2
12 ISO_B1
11 ISO_S3
level.
2, 3
ADP5062