CP2114-PCM1774EK Silicon Labs, CP2114-PCM1774EK Datasheet - Page 10

• Manufacturer Part Number: CP2114-PCM1774EK
• Description: Interface Development Tools CP2114-PCM1774 evaluation kit
• Manufacturer: Silicon Labs
• Type: USB to I2Sr

Specifications of CP2114-PCM1774EK

• Product: Evaluation Kits
• Tool Is For Evaluation Of: CP2114
• Interface Type: RS-232, USB
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Current: 28 mA
• For Use With: CP2114

CP2114-EK
5.1.3. UART Signals (J3)
An RS-232 transceiver circuit and DB9 connector (J3) are provided on the evaluation board to connect the CP2114
to external serial devices. See Table 3 for the RS-232 J3 pin descriptions.
5.1.4. CP2114 Pin Connectors (JP00-JP30)
The JP00-JP30 connectors connect and disconnect CP2114 pins from external circuits. By default, all of these
jumpers are populated.
5.1.5. VIO Power Connector (JP40)
This header (JP40) is included on the evaluation board to provide VIO power options. Populating the shorting block
connects the CP2114 VIO input (pin 6) to CP2114 VDD (pin 7). Remove the shorting block to power VIO from an
external source and connect the power source to pin 2 of the header.
5.1.6. REGIN Power Connector and Self-Powered Mode Connector (JP41)
The JP41 header is used to connect the CP2114 REGIN pin (pin 8) to the VBUS source from the USB connector
(default) or to the CP2114 VDD pin (pin 7). When connected to the VBUS source, the device is intended for bus-
powered operation. When connected to the CP2114 VDD pin, the device is intended for self-powered operation. In
self-powered operation, an external power source can be connected to the JP41 header to power the VDD pin
directly.
5.1.7. Test Point Connector (JP42)
The JP42 header contains test points and is not used in normal operation.
5.1.8. Si500 Enable Connector (JP43)
The JP43 header controls the power to the Si500 CMOS clock. Shorting pin 1 to pin 2 on the header will connect
CP2114 VDD (pin 7) to the Si500. Shorting pin 2 to pin 3 on the header will place the Si500 in powerdown mode.
The setting of JP43 depends on the desired clocking mode.
5.1.9. SCK to SCKIN Connector (JP44)
The JP44 jumper should be left installed.
5.1.10. DAC Selection Connector (JP45)
The JP45 header is used to select the CP2114 boot configuration after a reset. When a jumper is populated, the
corresponding GPIO pin in connected to ground. When a jumper is removed, the corresponding GPIO pin is
weakly pulled high.
Note: If any of the four DAC select pins are configured for a function other than DAC selection, the CP2114 will not use the
5.1.11. Green USB ACTIVE LED and Connector (JP46, D6)
The JP46 header is used to connect the CP2114 SUSPEND pin (pin 18) to the D6 green LED. When the LED is on,
the device has enumerated with the PC operating normally. When the LED is off, the device has not yet
enumerated or is in the USB Suspend state.
5.1.12. .Red USB SUSPEND LED and Connector (JP47, D5)
10
DAC select pins to choose a boot configuration.
Pin
2
3
5
7
8
Signal
Table 3. RS-232 Pin Descriptions
GND
RXD
TXD
RTS
CTS
Direction
CP2114
Output
Output
Input
Input
Rev. 0.1
Request to Send
Transmit Data
Clear to Send
Description
Receive Data
Ground