ADC1610S125F2/DB,598 NXP Semiconductors, ADC1610S125F2/DB,598 Datasheet
ADC1610S125F2/DB,598
Specifications of ADC1610S125F2/DB,598
Related parts for ADC1610S125F2/DB,598
ADC1610S125F2/DB,598 Summary of contents
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Quick start ADC1610S series Quick start ADC1610S series Quick start ADC1610S series ( versions) ( versions) Demonstration board for ADC1610S series Demonstration board for ADC1610S series Rev. 5 — January 2011 January 2011 Document information Document ...
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... NXP Semiconductors Revision history Rev Date Description 1 20081001 Initial version. 2 20090518 Update 3 20090610 Add SPI software description. 4 20100519 Add HSDC extension module acquisition system description. 5 20110120 Update with latest software tool. Quick start ADC1610S series ( versions) Quick start ...
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Overview of the ADC1610S demo board 1.1 ADC1610S F1 series (CMOS digital outputs) Figure below presents the connections to measure ADC1610S. USB SPI Register programming SYNTHESIZED SIGNAL GENERATOR I NPUT SIGNAL F ILTER . 2V sine wave . High-order ...
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ADC1610S F2 series (LVDS/DDR digital outputs) series (LVDS/DDR digital outputs) Figure below presents the connections to measure ADC nnections to measure ADC1610S. USB SPI Register programming programming SYNTHESIZED SIGNAL GENERATOR I NPUT SIGNAL F ILTER . 2V sine wave ...
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... NXP Semiconductors 1.3 Power supply The board is powered either with The board is powered either with adaptor. Table 1. Power supply Name Function J8 2.1 Jack connector – 5VDC Change ST9 and ST10 position accordingly hange ST9 and ST10 position accordingly J10 +3V green connector – Power supply 3 V ...
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... NXP Semiconductors Table 2. Input signals Name Function J1 IN connector – Analog input signal ( J2 CLKP connector – Single ended clock input signal ( matching), with a transformer. J3 CLKM connector – Grounded on that demoboard 1.5 Output signals in CMOS version (D0 to D15, DAV, OTR) The digital output signal is available in binary, 2’s complement or gray format. ...
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... NXP Semiconductors 1.6 Output signals in LVDS DDR version The digital output signal is available in binary, 2’s complement or gray format. A Data Valid Output clock (DAV) is provided by the device for the data acquisition. Table 4. Output signals Name Function J7 Samtec QTH connector – ADC digital output (D0 to D15) ...
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... NXP Semiconductors 1.7 SPI Mode The ADC1610S can be controlled either by a Serial Peripheral Interface (SPI PIN. Table 5. SPI Interface Name Function J12 USB connector – SPI interface 1.8 SPI program For more details on how to control device with SPI, refer to Quick start Quick start ADC1610S series ( versions) ...
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HSDC extension module: acquisition board The figure 4 shows an overview of the extension module HSDC-EXTMOD01/DB acquisition board: RED LED FOR +3V3 POWER SIGNAL GENERATOR R EFERENCE SIGNAL . Typical 10 MHz GREEN LED FOR EMBEDDED PLL LOCK STATUS ...
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... NXP Semiconductors The HSDC extension module is intended for acquisition/generation and clock generation purpose. When connected to an ADC demo-board it is intended as an acquisition system for digital output bits delivered by ADC, either CMOS (HE14 P1 connector) or LVDS DDR (SAMTEC QTH_060_02 P2 connector). The board brief specification is shown below memory size for acquisition pattern ...
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... NXP Semiconductors Fig 4. HSDC extension module: HE14 CMOS hardware schematic overview Quick start Quick start ADC1610S series ( versions) Rev. 5 — January 2011 Quick start © NXP B.V. 2011. All rights reserved ...
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Combo 1610S and HSDC extension module 3.1 ADC1610S setup CMOS outputs The figure 24 below shows an overview of the whole system ADC1610S+HSDC extension module with CMOS outputs configuration for which connection is straightforward, together with a supply extension ...
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ADC1610S setup LVDS/DDR outputs The figure 24 below shows an overview of the whole system ADC1610S+HSDC extension module with CMOS outputs configuration for which connection is straightforward, together with a supply extension module (release A) for the ADC1610S demo-board: ...
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... NXP Semiconductors 3.3 ADC Software tool Run the application “SW_ADC_1_r02.exe”. This application will allow: the user to control features on our high speed ADC through the SPI interface available on any ADC1610S series; As well as performing any online data acquisition to evaluate the performances of the ADC1610S series. ...
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... NXP Semiconductors Fig 8. SW_ADC_1_r02: “Info” page The HSDC-EXTMOD is not yet initialized, so the embedded PLL (LMK03001 in this example) is not locked. Initialization is only required for acquisition purpose. Quick start Quick start ADC1610S series ( versions) Rev. 5 — January 2011 Quick start © NXP B.V. 2011. All rights reserved. ...
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... NXP Semiconductors 3.3.1 ADC SPI programming Functional Registers page The page displays all SPI registers for ADC1610S series: Fig 9. SW_ADC_1_r02: “ADC - Functional Registers” page Perform any settings and then click on the “Send data to device” button to update the device registers. Quick start Quick start ADC1610S series ( versions) Rev. 5 — ...
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... NXP Semiconductors 3.3.2 ADC SPI programming Read Registers page This page can be used to read all registers by clicking on the “Read all registers” button and will display the result in the table below: Fig 10. SW_ADC_1_r02: “ADC - Read Registers” page When all registers have been read possible to save the data to a text file. The settings are saved in a table-like format as shown below: Table 6 ...
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... NXP Semiconductors Column 1 Column Note that all data are saved in hexadecimal format. Click on the “Save registers read to file” button to select the file to store data to. Make sure that you store your file with “.txt” extension, this will allow you to re-use the file on the “ADC - Load Registers” ...
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... NXP Semiconductors 3.3.4 Tools page This page allows the user to calculate the coherent frequencies values involved of the acquisition process. It gives an indication where the 6 first harmonics are located in the Nyquist zone. Enter your analog and sampling frequencies in field . Indicate the number of samples to be acquired , as well as the fixed parameter for the coherency calculation (Fs in our example above ). Press “ ...
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... NXP Semiconductors 3.3.5 Acquisition page This page will acquire data to evaluate the high dynamic performance of the device: Fig 13. SW_ADC_1_r02: “Acquisition” page Before proceeding to any acquisition, the user needs to do the following entries: the sampling frequency Fs: 122.88 Msps in our example (field the input frequency Fin: 5 MHz in our example (field ...
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... NXP Semiconductors Table 7. Dynamic results as stored in a text file Content of file is shown as table format Name Fin Fs Vin ENOB (MHz) (MHz) (dBFS) - ADC1610S test ADC0 5.00 122.88 -0.96 11.28 Note that while acquisition is running, any other action (ADC SPI programming, quit or refresh) is not possible. Stop acquisition first before proceeding to any other task. ...
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... NXP Semiconductors 3.3.5.2 Reorganized signal The reorganized signal displays the reconstructed sine wave from coherency calculation corresponding to 1 period of the input signal: Fig 15. SW_ADC_1_r02: “Acquisition” page, reorganized signal graph Press the “Autoscale” button to display the whole content. Quick start Quick start ADC1610S series ( versions) Rev. 5 — ...
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... NXP Semiconductors 3.3.5.3 Unreconstructed signal The unreconstructed signal displays the unreconstructed sine wave corresponding to the whole number of period being acquired following the coherency rule: Fig 16. SW_ADC_1_r02: “Acquisition” page, unreconstructed signal graph Press the “Autoscale” button to display the whole content. Use the zoom tool to observe in more details all the captured data. ...
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... NXP Semiconductors 3.3.5.4 Histogram The histogram graph shows the distribution of output codes. This graph shows which code is present and if there is any missing code in the conversion range: Fig 17. SW_ADC_1_r02: “Acquisition” page, code histogram graph Press the “Autoscale” button to display the whole content. ...
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... NXP Semiconductors 3.3.6 Info page This page will give practical information related to software and hardware settings: Fig 18. SW_ADC_1_r02: “Info” page The information visible on this page is: board serial number HSDC software release number HSDC-EXTMOD dll version HSDC-EXTMOD vhdl version HSDC-EXTMOD supply status HSDC-EXTMOD clock capability and status version HSDC-EXTMOD memory capability ...
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... NXP Semiconductors 4. Appendix A.1: coherency calculation The coherency relies on the fact that clock and analog input signal are synchronized and the first and last samples being captured are adjoining samples: it ensures a continuous digitized time process for the FFT processing. To achieve this, one has to Where odd integer equal to the number of periods being acquired and N the number of samples acquired ...
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... NXP Semiconductors 5. Notes For any question, feel free to contact us at the following e-mail dataconverter-support@nxp.com. Quick start Quick start ADC1610S series ( versions) Rev. 5 — January 2011 Quick start © NXP B.V. 2011. All rights reserved ...
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... NXP Semiconductors 6. Contents 1. Overview of the ADC1610S demo board ................................................................................................................. 3 1.1 ADC1610S F1 series (CMOS digital outputs) .......................................................................................................... 3 1.2 ADC1610S F2 series (LVDS/DDR digital outputs) ................................................................................................... 4 1.3 Power supply ............................................................................................................................................................ 5 1.4 Input signals (IN, CLK) ............................................................................................................................................. 5 1.5 Output signals in CMOS version (D0 to D15, DAV, OTR) ........................................................................................ 6 1.6 Output signals in LVDS DDR version ....................................................................................................................... 7 1.7 SPI Mode ................................................................................................................................................................. 8 1.8 SPI program ............................................................................................................................................................. 8 2. ...