TRK-USB-MPC5643L Freescale Semiconductor, TRK-USB-MPC5643L Datasheet - Page 106

• Manufacturer Part Number: TRK-USB-MPC5643L
• Description: Development Boards & Kits - Other Processors StarTrakMiniUSG MPC5643L
• Manufacturer: Freescale Semiconductor

Specifications of TRK-USB-MPC5643L

• Rohs: yes
• Product: Starter Kits
• Tool Is For Evaluation Of: MPC5643L
• Core: Five Stage Pipeline
• Interface Type: LIN, DSPI
• Operating Supply Voltage: 3 V to 3.6 V
• Data Bus Width: 32 bit, 64 bit
• Description/function: Starter Kit for MPC5643L
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• For Use With: MPC5643L

Electrical characteristics
106
1
2
3
4
5
6
7
All internal
destructive reset
sources
(LVDs or internal
HVD during
power-up and
during
operation)
Assertion of
RESET
All internal
functional reset
sources
configured for
long reset
All internal
functional reset
sources
configured for
short reset
Whether BIST is executed or not depends on the chip configuration data stored in the shadow sector of the NVM.
End of the internal reset sequence (as specified in
held low externally beyond the end of the internal sequence which would prolong the internal reset PHASE3 till
RESET is released externally.
The assertion of RESET can only trigger a reset sequence if the device was running (RESET released) before.
RESET does not gate a Destructive Reset Sequence, BIST enabled or a Destructive Reset Sequence, BIST
disabled. However, it can prolong these sequences if RESET is held low externally beyond the end of the internal
sequence (beyond PHASE3).
If RESET is configured for long reset (default) and if BIST is enabled via chip configuration data stored in the
shadow sector of the NVM.
If RESET is configured for long reset (default) and if BIST is disabled via chip configuration data stored in the
shadow sector of the NVM.
If RESET is configured for short reset
Internal reset sequence can only be observed by state of RESET if bidirectional RESET functionality is enabled for
the functional reset source which triggered the reset sequence.
Sequence
Trigger
Reset
3
Section 3.1
Destructive
Section 3.1
Sequence
Condition
Sequence
starts with
reset via
External
RESET
internal
trigger
Reset
9.4.1,
9.4.2,
Start
reset
reset
Table 32. Reset sequence trigger — reset sequence
MPC5643L Microcontroller Data Sheet, Rev. 8.1
Release of
Release of
Sequence
Indication
RESET
RESET
Reset
End
2
7
Destructiv
e Reset
Sequence,
BIST
enabled
Table
cannot trigger
cannot trigger
cannot trigger
1
triggers
31) can only be observed by release of RESET if it is not
Destructiv
e Reset
Sequence,
BIST
disabled
1
Reset Sequence
External
Reset
Sequenc
e Long,
BIST
enabled
triggers
cannot
cannot
cannot
trigger
trigger
trigger
4
Functiona
l Reset
Sequenc
e Long
triggers
triggers
cannot
cannot
trigger
trigger
Freescale Semiconductor
5
Functiona
l Reset
Sequenc
e Short
triggers
triggers
cannot
cannot
trigger
trigger
6