S-24CS04AFJ-TB-G Seiko Instruments, S-24CS04AFJ-TB-G Datasheet - Page 14

• Manufacturer Part Number: S-24CS04AFJ-TB-G
• Description: IC EEPROM 4KBIT 400KHZ 8SOP
• Manufacturer: Seiko Instruments

Specifications of S-24CS04AFJ-TB-G

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 4K (512 x 8)
• Speed: 400kHz
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOP
• Organization: 512 x 8
• Interface Type: 2-Wire
• Maximum Clock Frequency: 0.4 MHz
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Maximum Operating Current: 4 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 5.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14
2-WIRE CMOS SERIAL E
S-24CS01A/02A/04A/08A
6. 2 Page Write
The page write mode allows up to 8 bytes to be written in a single write operation in the S-24CS01A/02A
and 16 bytes to be written in a single write operation in the S-24CS04A/08A.
Basic data transmission procedure is the same as that in the "Byte Write". But instead of generating a
stop condition, the master transmits 8-bit write data up to 8 bytes before the page write.
When the E
following a start condition, it generates an acknowledge. Then the E
address, and responds with an acknowledge. After the E
with an acknowledge, it receives 8-bit write data corresponding to the next word address, and generates
an acknowledge. The E
succession. The E
Receiving a stop condition initiates a write cycle of the area starting from the designated memory address
and having the page size equal to the received write data.
SDA
LINE
Remark1. A1 is P1 in the S-24CS08A.
In S-24CS01A/02A, the lower 3 bits of the word address are automatically incremented every time when
the E
word address remain unchanged, and the lower 3 bits are rolled over and previously received data will be
overwritten.
In S-24CS04A, the lower 4 bits of the word address are automatically incremented every time when the
E
word address and page address (P0) remain unchanged, and the lower 4 bits are rolled over and
previously received data will be overwritten.
In S-24CS08A, the lower 4 bits of the word address are automatically incremented every time when the
E
word address and page address (P1 and P0) remain unchanged, and the lower 4 bits are rolled over and
previously received data will be overwritten.
2
2
PROM receives 8-bit write data. If the size of the write data exceeds 16 bytes, the upper 4 bits of the
PROM receives 8-bit write data. If the size of the write data exceeds 16 bytes, the upper 4 bits of the
2
PROM receives 8-bit write data. If the size of the write data exceeds 8 bytes, the upper 5 bits of the
S
T
A
R
T
2. A0 is P0 in the S-24CS04A/08A.
3. W7 is optional in the S-24CS01A.
M
S
B
1
0
2
ADDRESS
1
PROM receives a 7-bit device address and a 1-bit read / write instruction code set to "0",
DEVICE
0
A2 A1 A0
2
PROM can receive as many write data as the maximum page size.
L
S
B
W
R
T
E
R
W
0
I
/
2
A
C
K
PROM repeats reception of 8-bit write data and generation of acknowledge in
2
W7 W6 W5 W4 W3 W2 W1 W0
WORD ADDRESS (n)
PROM
Figure 14 Page Write
Seiko Instruments Inc.
A
C
K
D7 D6 D5 D4 D3 D2 D1 D0
DATA (n)
2
PROM receives 8-bit write data and responds
ADR INC
A
C
K
D7
DATA (n+1)
2
PROM receives an 8-bit word
ADR INC
D0
A
C
K
D7
DATA (n+x)
Rev.4.5
ADR INC
D0
A
C
K
_00
S
T
O
P