EVAL-AD7671EDZ Analog Devices, EVAL-AD7671EDZ Datasheet - Page 5

• Manufacturer Part Number: EVAL-AD7671EDZ
• Description: Data Conversion IC Development Tools EVALUATION BOARD
• Manufacturer: Analog Devices
• Type: ADCr
• Series: AD7671r

Specifications of EVAL-AD7671EDZ

• Rohs: yes
• Product: Evaluation Boards
• Tool Is For Evaluation Of: AD7671
• Interface Type: SPI
• Operating Supply Voltage: 4.75 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Factory Pack Quantity: 1

REV. C
ABSOLUTE MAXIMUM RATINGS
Analog Inputs
Ground Voltage Differences
Supply Voltages
Internal Power Dissipation
Internal Power Dissipation
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150∞C
Storage Temperature Range . . . . . . . . . . . . –65∞C to +150∞C
Lead Temperature Range
NOTES
1
2
3
4
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD7671 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
Stresses above those listed under Absolute Maximum Ratings may cause permanent
damage to the device. This is a stress rating only; functional operation of the device
at these or any other conditions above those indicated in the operational section of
this specification is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
See Analog Inputs section.
Specification is for device in free air: 48-Lead LQFP: q
Specification is for device in free air: 48-Lead LFCSP: q
IND
INA, REF, INGND, REFGND, AGND
AGND, DGND, OGND . . . . . . . . . . . . . . . . . . . . . . ± 0.3 V
AVDD, DVDD, OVDD . . . . . . . . . . . . . . . . . –0.3 V to +7 V
AVDD to DVDD, AVDD to OVDD . . . . . . . . . . . . . . ± 7 V
DVDD to OVDD . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Digital Inputs . . . . . . . . . . . . . . . . –0.3 V to DVDD + 0.3 V
(Soldering 10 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . 300∞C
. . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to AVDD + 0.3 V
Figure 1. Load Circuit for Digital Interface Timing,
SDOUT, SYNC, SCLK Outputs, C
2
, INC
TO OUTPUT
*
IN SERIAL INTERFACE MODES, THE SYNC, SCLK, AND
SDOUT TIMINGS ARE DEFINED WITH A MAXIMUM LOAD
C
L
2
OF 10pF; OTHERWISE, THE LOAD IS 60pF MAXIMUM.
, INB
PIN
2
. . . . . . . . . . . . . . . . . . . . –11 V to +30 V
60pF
C
3
4
L
*
500 A
1.6mA
. . . . . . . . . . . . . . . . . . . . 700 mW
. . . . . . . . . . . . . . . . . . . . . . 2.5 W
1
I
I
OH
OL
L
= 10 pF
JA
JA
= 91∞C/W, q
= 26∞C/W.
1.4V
JC
= 30∞C/W.
–5–
NC = NO CONNECT
D2/DIVSCLK[0]
D3/DIVSCLK[1]
Figure 2. Voltage Reference Levels for Timing
BYTESWAP
IMPULSE
SER/PAR
OB/2C
WARP
AGND
AVDD
t
DELAY
0.8V
NC
D0
D1
NOTES:
1. PADDLE CONNECTED TO AGND FOR THE LFCSP (CP-48-1). THIS
10
11
12
CONNECTION IS NOT REQUIRED TO MEET THE ELECTRICAL
PERFORMANCES.
1
2
3
4
5
6
7
8
9
PIN CONFIGURATION
13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44
ST-48 and CP-48
PIN 1
IDENTIFIER
2V
0.8V
(Not to Scale)
TOP VIEW
AD7671
43 42 41 40
2V
39 38 37
-1
t
DELAY
2V
0.8V
AD7671
36
35
34
33
32
31
30
29
28
27
26
25
AGND
CNVST
PD
RESET
CS
RD
DGND
BUSY
D15
D14
D13
D12